M50LPW116

The M50LPW116 is a 16 Mbit (2Mb x8) nonvolatile memory that can be read, erased and reprogrammed. These operations can be performed using a single lovoltage (3.0 to 3.6V) supply. For fast programming, and fast erasing, an optional 12V power supply can be used to reduce the programming and the erasing times.

The M50LPW116 memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Blocks can be protected individually (except Blocks 15 to 0, which have global protection) to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards.

The M50LPW116 features an asymmetrical block architecture. It has an array of 50 blocks: 1 Boot Block of 16KBytes, 2 Parameter Blocks of 8KBytes, 1 Main Block of 32KBytes, 30 Main Blocks of 64KBytes and 16 Parameter Blocks of 4KBytes.

Two different bus interfaces are supported by the memory. The primary interface is the Low Pin Count (or LPC) Standard Interface. This has been designed to remove the need for the ISA bus in current PC Chipsets; the M50LPW116 acts as the PC BIOS on the Low Pin Count bus for these PC Chipsets.

The M50LPW116 secondary interface, the Address/Address Multiplexed (or A/A Mux) Interface, is designed to be compatible with current Flash Programmers for production line programming prior to fitting to a PC Motherboard.

The M50LPW116 memory is offered in TSOP40 (10 x 20mm) package and it is supplied with all the bits erased (set to '1').