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M464S6453CKS

Features: • Performance range• Burst mode operation• Auto & self refresh capability (8192 Cycles/64ms)• LVTTL compatible inputs and outputs• Single 3.3V ± 0.3V power supply• MRS cycle with address key programs Latency (Access from column address) Burst lengt...

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M464S6453CKS: Features: • Performance range• Burst mode operation• Auto & self refresh capability (8192 Cycles/64ms)• LVTTL compatible inputs and outputs• Single 3.3V ± 0.3V powe...

M464S6453CKS Data Sheet

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Part Number:
M464S6453CKS
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• Performance range
• Burst mode operation
• Auto & self refresh capability (8192 Cycles/64ms)
• LVTTL compatible inputs and outputs
• Single 3.3V ± 0.3V power supply
• MRS cycle with address key programs
   Latency (Access from column address)
   Burst length (1, 2, 4, 8 & Full page)
   Data scramble (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock
• Serial presence detect with EEPROM
• PCB : Height (1,200mil), double sided component


Specifications

Parameter
Symbol
Value
Unit
Voltage on any pin relative to Vss
VIN, VOUT
-1.0 ~ 4.6
V
Voltage on VDD & VDDQ supply relative to VSS
VDD, VDDQ
-1.0 ~ 4.6
V
Storage temperature
TSTG
-55 ~ +150
Power dissipation
PD
16
W
Short circuit current
IOS
50
mA

Note :Permanent device damage may occur if" ABSOLUTE MAXIMUM RATINGS "are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.


Description

The Samsung M464S6453CKS is a 64M bit x 64 Synchronous Dynamic RAM high density memory module. The Samsung M464S6453CKS consists of eight CMOS 64M x 8 bit with 4banks Synchronous DRAMs in TSOP-II 400mil package and a 2K EEPROM in 8-pin TSSOP package on a 144-pin glass-epoxy substrate. Three 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM. The M464S6453CKS is a Small Outline Dual In-line Memory Module and is intended for mounting into 144-pin M46S6453CKS edge connector sockets.

Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications.




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