M41ST87Y

The M41ST87Y/W Serial TIMEKEEPER^®/Controller SRAM is a low power 1280-bit, static CMOS SRAM organized as 160 bytes by 8 bits. A built-in 32.768 kHz oscillator (internal crystal-controlled) and 8 bytes of the SRAM (see Table 6., page 23) are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. An additional 11 bytes of RAM M41ST87Y/W provide calibration, status/control of Alarm, Watchdog, Tamper, and Square Wave functions. 8 bytes of ROM and finally 128 bytes of User RAM are also provided. Addresses and data are transferred serially via a two line, bi-directional I2C interface. The built-in address register is incremented automatically after each WRITE or READ data byte. The M41ST87Y/ W has a built-in power sense circuit which detects power failures and automatically switches to the battery supply when a power failure occurs. The energy needed to sustain the SRAM and clock operations of M41ST87Y/W can be supplied by a small lithium buttoncell supply when a power failure occurs.

Functions of M41ST87Y/W available to the user include a non-volatile, time-of-day clock/calendar, Alarm interrupts, Tamper Detection, Watchdog Timer, and programmable Square Wave output. Other features include a Power-On Reset as well as two additional debounced inputs (RSTIN1 and RSTIN2) M41ST87Y/W can also generate an output Reset (RST). TheController SRAM is a low power 1280-bit, static CMOS SRAM organized as 160 bytes by 8 bits. A built-in 32.768 kHz oscillator (internal crystal-controlled) and 8 bytes of the SRAM (see Table 6., page 23) are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. An additional 11 bytes of RAM provide calibration, status/control of Alarm, Watchdog, Tamper, and Square Wave functions. 8 bytes of ROM and finally 128 bytes of User RAM are also provided. Addresses and data are transferred serially via a two line, bi-directional I2C interface. The built-in address register is incremented automatically after each WRITE or READ data byte. The M41ST87Y/ W has a built-in power sense circuit which detects power failures and automatically switches to the battery supply when a power failure occurs. The energy needed to sustain the SRAM and clock operations can be supplied by a small lithium buttoncell supply when a power failure occurs.

Functions of M41ST87Y/W available to the user include a non-volatile, time-of-day clock/calendar, Alarm interrupts, Tamper Detection, Watchdog Timer, and programmable Square Wave output. Other features include a Power-On Reset as well as two additional debounced inputs (RSTIN1 and RSTIN2) M41ST87Y/W can also generate an output Reset (RST). The eight clock address locations contain the century, year, month, date, day, hour, minute, second and tenths/hundredths of a second in 24 hour BCD format. Corrections for 28, 29 (leap year), 30 and 31 day months are made automatically.

M41ST87Y/W Security Features
Two fully independent Tamper Detection Inputs of M41ST87Y/W allow monitoring of multiple locations within the system. Programmable bits provide both, "Normally Open" and "Normally Closed" switch monitoring. Time Stamping of the tamper event is automatically  provided. There is also an option allowing data stored in either internal memory (128 bytes), and/ or external memory to be cleared, protecting sensitive information in the event tampering occurs.  By embedding the 32kHz crystal in the package, the clock is completely isolated from external tampering. An Oscillator Fail Bit (OF) is also provided to ensure correct operation of the oscillator. The M41ST87Y/W is supplied in a 28-pin, 300mil SOIC M41ST87Y/W package (MX) which includes an embedded 32kHz crystal.

The SOIC package of M41ST87Y/W is shipped in plastic anti-static tubes or in Tape & Reel form.

The 300mil, embedded crystal SOIC M41ST87Y/W requires only a user-supplied battery to provide non-volatile operation.