Features: ` 5.0 OR 3.0V OPERATING VOLTAGE` SERIAL INTERFACE SUPPORTS I2C BUS (400 KHz)` NVRAM SUPERVISOR FOR EXTERNAL LPSRAM` OPTIMIZED FOR MINIMAL INTERCONNECT TO MCU` 2.5 TO 5.5V OSCILLATOR OPERATING VOLTAGE` AUTOMATIC SWITCH-OVER and DESELECT CIRCUITRY` CHOICE OF POWER-FAIL DESELECT VOLTAGES M...
M41ST85Y: Features: ` 5.0 OR 3.0V OPERATING VOLTAGE` SERIAL INTERFACE SUPPORTS I2C BUS (400 KHz)` NVRAM SUPERVISOR FOR EXTERNAL LPSRAM` OPTIMIZED FOR MINIMAL INTERCONNECT TO MCU` 2.5 TO 5.5V OSCILLATOR OPERAT...
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Symbol |
Parameter |
Value |
Unit | |
TSTG |
Storage Temperature (VCC Off, Oscillator Off) | SNAPHAT® |
40 to 85 |
|
SOIC |
55 to 125 |
|||
TSLD (1) |
Lead Solder Temperature for 10 seconds |
260 |
||
VIO |
Input or Output Voltage |
0.3 to VCC +0.3 |
V | |
VCC |
Supply Voltage | M41ST85Y |
0.3 to 7 |
V |
M41ST85W |
0.3 to 4.6 |
V | ||
IO |
Output Current |
20 |
mA | |
PD |
Power Dissipation |
1 |
W |
The M41ST85Y/W Serial TIMEKEEPER®/Controller SRAM is a low power 512-bit, static CMOS SRAM organized as 64 words by 8 bits. A built-in 32.768 kHz oscillator (external crystal controlled) and 8 bytes of the SRAM M41ST85Y/W (see Table 8, page 18) are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. An additional 12 bytes of RAM provide status/control of Alarm, Watchdog and Square Wave functions. Addresses and data are transferred serially via a two line, bi-directional I2C interface. The built-in address register is incremented automatically after each WRITE or READ data byte. The M41ST85Y/W has a built-in power sense circuit which detects power failures and automatically switches to the battery supply when a power failure occurs. The energy needed to sustain the SRAM and clock operations of M41ST85Y/W can be supplied by a small lithium button-cell supply when a power failure occurs.
Functions of M41ST85Y/W available to the user include a non-volatile, time-of-day clock/calendar, Alarm interrupts, Watchdog Timer and programmable Square Wave output. Other features include a Power-On Reset as well as two additional debounced inputs (RSTIN1 and RSTIN2) M41ST85Y/W can also generate an output Reset (RST). The eight clock address locations contain the century, year, month, date, day, hour, minute, second and tenths/hundredths of a second in 24 hour BCD format. Corrections for 28,29 (leap year - valid until year 2100), 30 and 31 day months are made automatically.
The M41ST85Y/W is supplied in a 28-lead SOIC SNAPHAT® package (which integrates both crystal and battery in a single SNAPHAT top) or a 28- pin, 300mil SOIC package (MX) M41ST85Y/W includes an embedded 32kHz crystal.
The 28-pin, 330mil SOIC provides sockets with gold plated contacts at both ends for direct connection to a separate SNAPHAT housing containing the battery and crystal. The unique design of M41ST85Y/W allows the SNAPHAT battery/crystal package to be mounted on top of the SOIC package after the completion of the surface mount process.
Insertion of the SNAPHAT M41ST85Y/W housing after reflow prevents potential battery and crystal damage due to the high temperatures required for device surface- mounting. The SNAPHAT M41ST85Y/W housing is also keyed to prevent reverse insertion.
The SOIC M41ST85Y/W and battery/crystal packages are shipped separately in plastic anti-static tubes or in Tape & Reel form. For the 28-lead SOIC, the battery/ crystal package (e.g., SNAPHAT) part number is "M4TXX-BR12SH"M41ST85Y/W (see Table 15, page 27).
Caution: Do not place the SNAPHAT battery/crystal top in conductive foam, as this will drain the lithium button-cell battery.
The 300mil, embedded crystal SOIC requires only a user-supplied battery to provide non-volatile operation.