M40SZ100Y

Features:

` CONVERT LOW POWER SRAMs INTO NVRAMs
 ` 5V OR 3V OPERATING VOLTAGE
 ` PRECISION POWER MONITORING and POWER SWITCHING CIRCUITRY
 ` AUTOMATIC WRITE-PROTECTION WHEN VCC IS OUT-OF-TOLERANCE
 ` CHOICE OF SUPPLY VOLTAGES and POWER-FAIL DESELECT VOLTAGES:
     M40SZ100Y: V<sub>CC</sub> = 4.5 to 5.5V; 4.20V  V<sub>PFD</sub>   4.50V
     M40SZ100W: V<sub>CC</sub> = 2.7 to 3.6V; 2.55V V<sub>PFD</sub> 2.70V
 ` RESET OUTPUT (RST) FOR POWER ON RESET
 ` 1.25V REFERENCE (for PFI/PFO)
 ` LESS THAN 10ns CHIP ENABLE ACCESS PROPAGATION DELAY (at 5V)
 ` OPTIONAL PACKAGING INCLUDES A 28- LEAD SOIC and SNAPHAT<sup>®</sup> TOP (to be ordered separately)
 ` 28-LEAD SOIC PACKAGE PROVIDES DIRECT CONNECTION FOR A SNAPHAT TOP WHICH CONTAINS THE BATTERY
 ` BATTERY LOW PIN (BL) 


Specifications

Symbol	Parameter		Value	Unit
TSTG	Storage Temperature (VCC Off)	SNAPHAT	40 to 85
		SOIC	50 to 125
TSLD (1)	Lead Solder Temperature for 10 seconds		280
VIO	Input or Output Voltages		0.3 to VCC +0.3	V
VCC	Supply Voltage	M40SZ100Y	0.3 to 7	V
		M40SZ100W	0.3 to 4.6	V
IO	Output Current		20	mA
PD	Power Dissipation		1	W

Note: 1. Reflow at peak temperature of 215 to 225 for < 60 seconds (total thermal budget not to exceed 180 for between 90 to 120 seconds).
CAUTION: Negative undershoots below 0.3V are not allowed on any pin while in the Battery Back-up mode.
CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.


Description

The M40SZ100Y/W NVRAM Controller is a selfcontained device which converts a standard lowpower SRAM into a non-volatile memory. A precision voltage reference and comparator monitors the V_CC input for an out-of-tolerance condition.

When an invalid V_CC condition occurs, the conditioned chip enable output (E_CON) is forced inactive to write protect the stored data in the SRAM. During a power failure, the M40SZ100Y/W  is switched from the V_CC pin to the lithium cell within the SNAPHAT (or external battery for the 16-lead SOIC) to provide the energy required for data retention. On a subsequent power-up, the SRAM remains write protected until a valid power condition returns.

The 28-pin, 330 mil SOIC provides sockets with gold plated contacts for direct connection to a separate SNAPHAT^® housing containing the battery. The SNAPHAT housing has gold plated pins which mate with the sockets, ensuring reliable connection. The housing is keyed to prevent improper insertion. This unique design allows the SNAPHAT battery package to be mounted on topof the SOIC package after the completion of the surface mount process which greatly reduces the board manufacturing process complexity of either directly soldering or inserting a battery into a soldered holder. Providing non-volatility becomes a "SNAP." This feature of M40SZ100Y/W  is also available in the "topless" 16-pin SOIC package (MQ).

Insertion of the SNAPHAT housing after reflow prevents potential battery damage due to the high temperatures required for device surface-mounting. The SNAPHAT housing is also keyed to prevent reverse insertion.

The 28-pin SOIC and battery packages of M40SZ100Y/W  are shipped separately in plastic anti-static tubes or in Tape & Reel form. For the 28-lead SOIC, the battery/ crystal package (e.g., SNAPHAT) part number is "M4ZXX-BR00SH" (see Table 13, page 17). Caution: Do not place the SNAPHAT battery top in conductive foam, as this will drain the lithium button-cell battery.