Position: Home  > All Categories> Integrated Circuits (ICs) > M4-32

M4-32

Features: ` High-performance, E2CMOS 3.3-V & 5-V CPLD families` Flexible architecture for rapid logic designs - Excellent First-Time-FitTM and refit feature - SpeedLockingTM performance for guaranteed fixed timing - Central, input and output switch matrices for 100% routability and 100% pin-ou...

product image

M4-32 Picture
See larger image
SeekIC No. : 004405272 Detail

M4-32: Features: ` High-performance, E2CMOS 3.3-V & 5-V CPLD families` Flexible architecture for rapid logic designs - Excellent First-Time-FitTM and refit feature - SpeedLockingTM performance for guar...

M4-32 Data Sheet

floor Price/Ceiling Price

Get Latest Price
Part Number:
M4-32
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/11/27

add to my favourite

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

` High-performance, E2CMOS 3.3-V & 5-V CPLD families
` Flexible architecture for rapid logic designs
    - Excellent First-Time-FitTM and refit feature
    - SpeedLockingTM performance for guaranteed fixed timing
    - Central, input and output switch matrices for 100% routability and 100% pin-out retention
` High speed
    - 7.5ns tPD Commercial and 10ns tPD Industrial
    - 111.1MHz fCNT
` 32 to 256 macrocells; 32 to 384 registers
` 44 to 256 pins in PLCC, PQFP, TQFP and BGA packages
` Flexible architecture for a wide range of design styles
    - D/T registers and latches
    - Synchronous or asynchronous mode
    - Dedicated input registers
    - Programmable polarity
    - Reset/ preset swapping
` Advanced capabilities for easy system integration
    - 3.3-V & 5-V JEDEC-compliant operations
    - JTAG (IEEE 1149.1) compliant for boundary scan testing
    - 3.3-V & 5-V JTAG in-system programming
    - PCI compliant (-7/-10/-12 speed grades)
    - Safe for mixed supply voltage system designs
    - Bus-FriendlyTM inputs and I/Os
    - Programmable security bit
    - Individual output slew rate control
` Advanced E2CMOS process provides high-performance, cost-effective solutions
` Supported by ispDesignEXPERTTM software for rapid logic development
    - Supports HDL design methodologies with results optimized for MACH 4
    - Flexibility to adapt to user requirements
    - Software partnerships that ensure customer success
` Lattice and third-party hardware programming support
    - LatticePROTM software for in-system programmability support on PCs and automated test equipment
    - Programming support on all major programmers including Data I/O, BP Microsystems, Advin, and System General 


Specifications

Storage Temperature . . . . . . . . . . . . . .-65  to +150
Ambient Temperature
with Power Applied . . . . . . . . . . . . . . ..-55  to +100
Device Junction Temperature . . . . . . . . . . . . .. ...+130
Supply Voltage
with Respect to Ground . . . . . . . . . . .. .-0.5 V to +7.0 V
DC Input Voltage . . . . . . . . . . . .. -.0.5 V to VCC + 0.5 V
Static Discharge Voltage . . . . . . . . . . . . . . . ... .. 2000 V
Latchup Current (TA = -40  to +85 ). . . . . . ..200 mA
Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. 


Description

The MACH® 4 family from Lattice offers an exceptionally flexible architecture and delivers a superior Complex Programmable Logic Device (CPLD) solution of easy-to-use silicon products and software tools. The overall benefits for users are a guaranteed and predictable CPLD solution, faster time-to-market, greater flexibility and lower cost. The MACH 4 devices offer densities ranging from 32 to 256 macrocells with 100% utilization and 100% pin-out retention. The MACH 4 family offer 5-V (M4-xxx) and 3.3-V (M4LV-xxx) operation.

MACH 4 products are 5-V or 3.3-V in-system programmable through the JTAG (IEEE Std. 1149.1) interface. JTAG boundary scan testing of MACH 4 also allows product testability on automated test equipment for device connectivity.

All MACH 4 family members deliver First-Time-Fit and easy system integration with pin-out retention after any design change and refit. For both 3.3-V and 5-V operation, MACH 4 products can deliver guaranteed fixed timing as fast as 7.5 ns tPD and 111 MHz fCNT through the SpeedLocking feature when using up to 20 product terms per output (Table 2).

The MACH 4 family offers numerous density-I/O combinations in Thin Quad Flat Pack (TQFP), Plastic Quad Flat Pack (PQFP), Plastic Leaded Chip Carrier (PLCC), and Ball Grid Array (BGA) packages ranging from 44 to 256 pins (Table 3). MACH 4 also offers I/O safety features for mixedvoltage designs so that the 3.3-V devices can accept 5-V inputs, and 5-V devices do not overdrive 3.3-V inputs. Additional features include Bus-Friendly inputs and I/Os, a programmable powerdown mode for extra power savings and individual output slew rate control for the highest speed transition or for the lowest noise transition.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
You may also be interested in :
View more