Features: · Integrated SAW (surface acoustic wave) delay line; low phase jitter of < 0.5ps rms, typical (12kHz to 20MHz or 50kHz to 80MHz)· Output frequencies of 15 to 700 MHz *· LVPECL clock output (CML and LVDS options available)· Reference clock inputs support differential LVDS, LVPECL, as w...
M2021: Features: · Integrated SAW (surface acoustic wave) delay line; low phase jitter of < 0.5ps rms, typical (12kHz to 20MHz or 50kHz to 80MHz)· Output frequencies of 15 to 700 MHz *· LVPECL clock out...
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Toggle Switches ON-OFF .453 LRG BAT 12MM BSHNG SLDR LUG
Symbol |
Parameter |
Rating |
Unit |
VI | Inputs |
-0.5 to VCC +0.5 |
V |
VO | Outputs |
-0.5 to VCC +0.5 |
V |
VCC | Power Supply Voltage |
4.6 |
V |
TS | Storage Temperature |
-45 to +100 |
The M2020/21 is a VCSO (Voltage Controlled SAW Oscillator) based clock jitter attenuator PLL designed for clock jitter attenuation and frequency translation. The device is ideal for generating the transmit reference clock for optical network systems supporting 2.5-10 GB data rates. It can serve to jitter attenuate a stratum reference clock or a recovered clock in loop timing mode. The M2020/21 module includes a proprietary SAW (surface acoustic wave) delay line as part of the VCSO. This results in a high frequency, high-Q, low phase noise oscillator that assures low intrinsic output jitter.