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LZ23H3V1

Features: ` Optical size : Number of effective pixels- Approx. 1 000 k; 6.6 mm- Approx. 790 k; 5.9 mm (compatible with XGA format)` Interline scan format` Square pixel` Number of effective pixels : 1 174 (H) x 884 (V)` Number of optical black pixels- Horizontal : 3 front and 40 rear- Vertical : 7 ...

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SeekIC No. : 004403773 Detail

LZ23H3V1: Features: ` Optical size : Number of effective pixels- Approx. 1 000 k; 6.6 mm- Approx. 790 k; 5.9 mm (compatible with XGA format)` Interline scan format` Square pixel` Number of effective pixels : ...

LZ23H3V1 Data Sheet

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Part Number:
LZ23H3V1
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

` Optical size : Number of effective pixels
- Approx. 1 000 k; 6.6 mm
- Approx. 790 k; 5.9 mm (compatible with XGA format)
` Interline scan format
` Square pixel
` Number of effective pixels : 1 174 (H) x 884 (V)
` Number of optical black pixels
- Horizontal : 3 front and 40 rear
- Vertical : 7 front and 2 rear
` Number of dummy bits
- Horizontal : 22
- Vertical : 2
` Pixel pitch : 4.6 µm (H) x 4.6 µm (V)
` R, G, and B primary color mosaic filters
` Supports monitoring mode
` Low fixed-pattern noise and lag
` No burn-in and no image distortion
` Blooming suppression structure
` Built-in output amplifier
` Built-in overflow drain voltage circuit and reset gate voltage circuit
` Variable electronic shutter
` Package : 16-pin shrink-pitch WDIP [Ceramic] (WDIP016-N-0500C) Row space : 12.70 mm



Pinout

Connection Diagram


Specifications

PARAMETER
SYMBOL
RATING
UNIT
NOTE
Output transistor drain voltage
VOD
0 to +18
V
Overflow drain voltage
VOFD

Internal output
V
1
Reset gate clock voltage
VRS
Internal output
V
2
Vertical shift register clock voltage
VV

VPW to +18
V
Horizontal shift register clock voltage
VH
-0.3 to +12
V
Voltage difference between P-well and vertical clock
VPW-VV
-29 to 0
V
Voltage difference between vertical clocks

VV-VV
0 to +15
V
3
Storage temperature
TSTG
-40 to +85
Ambient operating temperature
TOPR
-20 to +70


NOTES :
1. Do not connect to DC voltage directly. When OFD is connected to GND, connect VOD to GND. Overflow drain clock is applied below 27 Vp-p.
2. Do not connect to DC voltage directly. When RS is connected to GND, connect VOD to GND. Reset gate clock is applied below 8 Vp-p.
3. When clock width is below 10 µs, and clock duty factor is below 0.1%, voltage difference between vertical clocks will be below 28 V.




Description

The LZ23H3V1 is a 1/3-type (6.0 mm) solid-state image sensor that consists of PN photo-diodes and CCDs (charge-coupled devices). With approximately 1 090 000 pixels (1 217 horizontal x 893 vertical), the sensor provides a stable highresolution color image.




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