Features: SpecificationsDescriptionThe LR37632 has the following features including Effective frame signal detection and protection function with a couple of synchronizing protection circuits;Automatic sequential control function which enables spin motor control by Start/Stop signal alone;Smooth m...
LR37632: Features: SpecificationsDescriptionThe LR37632 has the following features including Effective frame signal detection and protection function with a couple of synchronizing protection circuits;Automa...
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The LR37632 has the following features including Effective frame signal detection and protection function with a couple of synchronizing protection circuits;Automatic sequential control function which enables spin motor control by Start/Stop signal alone;Smooth muting output without click sound;High accuracy and high-speed feed system capable of counting number of tracks;Heading function which enables designation by total time alone;16-bit serial/parallel output;Double oversampling digital filter;Low power consumption.
The LR37632 is a CMOS LSI for signal processing and servo control in DAD (Digital Audio Disc) system of CD (Compact Disc) unit.This LSI provides functions of signal processing such as modulation of EFM signal being output from photoelectric pick-up, address generation of external RAM for de-interleave, detection and correction of error and digital filtering of double oversampling, and servo controls are executed with 1 chip.Change in amplitude of "HF" signal generated by track crossing is sampled at zero cross point of tracking error signal "TER", HFS signal is created as an internal signal, "TROF" signal is output by the logic of internal circuit as shown above. Servo circuit is turned ON/OFF by this change in signal Level so that the track can easily be caught.
Feed servo control mode is initiated during high speed searching by FEED FOR and FEED RET.command or SEARCH command. Feed servo loop is discontinued by the signal output from FEOF pin,and field pulse signal for pick-up movement is output from FEM-i-pin and FEM-pin.The pickup moves to the intended direction by this operation.Furthermore, signals SWR and SWL for DAC deglitching showing RIGHT signal and LEFT signal are output together with the data.SDSY pin outputs a synchronizing signal that becomes "Low" when SDO is RIGHT signal and outputs a synchronizing signal that becomes "High" when SDO is LEFT signal. Data latch signal for DAC is output from LROR pin.In the case music signal data that requires deemphasis operation is being output, "High" signal is output from DEPH pin.