LP3927

Application`Cellular/PCS handsets` PDA's, Palmtops, and portable terminals`SingleCell Li+ Systems` 2- or 3- Cell NiMH, NiCd or Alkaline SystemPinoutSpecifications Power on Reset Yes Watchdog No Power Fail Input No Manual Reset Yes On/Off Pin Yes Error Flag Yes Input Mi...

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LP3927 Picture
SeekIC No. : 004398851 Detail

LP3927: Application`Cellular/PCS handsets` PDA's, Palmtops, and portable terminals`SingleCell Li+ Systems` 2- or 3- Cell NiMH, NiCd or Alkaline SystemPinoutSpecifications Power on Reset Yes Watchdo...

floor Price/Ceiling Price

Part Number:
LP3927
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Application

`Cellular/PCS handsets
` PDA's, Palmtops, and portable terminals
`SingleCell Li+ Systems
` 2- or 3- Cell NiMH, NiCd or Alkaline System





Pinout

  Connection Diagram




Specifications

Power on Reset Yes
Watchdog No
Power Fail Input No
Manual Reset Yes
On/Off Pin Yes
Error Flag Yes
Input Min Voltage 3 Volt
Input Max Voltage 5.5 Volt
Output Current 150 mA
Output Voltage 2.6 Volt
RegType Supervisor
Temperature Min -40 deg C
Temperature Max 85 deg C
View Using Catalog


All pins except LED_PGM,
BYP, op amp's inputs & output ..................−0.3V to 6.0V
OP_AMP_OUT, IN-, IN+ .......................-0.3V to 5.5V
GND to GND SLUG .............................±0.3V
Junction Temperature.......................... 150°C
Storage Information......................−65°C to 150°C
Soldering Temperature
Pad Temperature ............................. 235°C
Maximum Power Dissipation (Note 3).................... 2.6W
ESD (Note 4): KYBD .............................4 kV
All other pins ................................2 kV





Description

The LP3927 system power management IC is designed for cellular/PCS handsets as well as other portable systems that require intelligent power management. Each device contains five low-dropout linear regulators (LDO's), a reset timer, a power-up control logic, a general-purpose open drain output that can be used to light LEDs, and a CMOS rail-to-rail input/output operational amplifier.

Each linear regulator features an extremely low dropout voltage of 100 mV (typ) at maximum output current. LDO1 and LDO2 are powered on and off by either the KYBD or the VEXT# pin. LDO3, LDO4 and LDO5 each have its independent enable pin. LDO1 and LDO4 are rated at 150 mA each, LDO2 and LDO5 are rated at 200 mA each and LDO3 is rated at 100 mA. All LDO's are optimized for low noise and high isolation.

The open drain output current sink can be programmed up to 150 mA by using an external low cost resistor.

A single supply, low voltage operational amplifier has rail to rail input and output with 600 kHz of gain-bandwidth product.

Reliability Metrics


Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
LP3927ILQ-AJ CMOS7 0 16561 0 0 954000 4 270700104
LP3927ILQ-AZ CMOS7 0 16561 0 0 954000 4 270700104
LP3927ILQX-AJ CMOS7 0 16561 0 0 954000 4 270700104
LP3927ILQX-AZ CMOS7 0 16561 0 0 954000 4 270700104

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.







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