Features: `Standard VOUT values of 0.8V and 1.2V
`Stable with 10 F ceramic capacitors
`Dropout voltage of 240 mV (typical) at 3A load current
`Precision Output Voltage across all line and load conditions:
- ±1.0% for TJ = 25°C
- ±2.0% for 0°C TJ +125°C
- ±3.0% for -40°C TJ +125°C
`Over-Temperature and Over-Current protection
`Available in 5 lead TO-220 and TO-263 packages
`Custom VOUT values between 0.8V and 1.2V are available
`-40°C to +125°C Operating Temperature RangeApplication·ASIC Power Supplies In:
- Desktops, Notebooks, and Graphics Cards, Servers
- Gaming Set Top Boxes, Printers and Copiers
·Server Core and I/O Supplies
·DSP and FPGA Power Supplies
·SMPS Post-Regulator
Pinout
Specifications
| Output Current |
3000 mA |
| Output Min |
1.2, 0.8 Volt |
| Input Min Voltage |
1.55, 1.15 Volt |
| Input Max Voltage |
5.5 Volt |
| Dropout Voltage |
0.240 Volt |
| Adjustable Output |
No |
| Quiescent Current |
10 mA |
| On/Off Pin |
Yes |
| Error Flag |
No |
| RegType |
LDO |
| Temperature Min |
-40 deg C |
| Temperature Max |
125 deg C |
| Output Voltage |
1.2, 0.8 Volt |
| Output Max |
1.2, 0.8 Volt |
| PowerWise |
Yes |
| View Using Catalog |
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Storage Temperature Range.............. −65°C to +150°C
Lead Temperature
Soldering, 5 seconds....................... 260°C
ESD Rating
Human Body Model (Note 2).................... ±2 kV
Power Dissipation (Note 3)............... Internally Limited
VIN Supply Voltage (Survival) ...............−0.3V to +6.0V
VBIAS Supply Voltage (Survival) ..............−0.3V to +6.0V
VEN Voltage (Survival) ...................−0.3V to +6.0V
VOUT Voltage (Survival) ..................−0.3V to +6.0V
IOUT Current (Survival)................. Internally Limited
Junction Temperature .................−40°C to +150°C
DescriptionThe LP38856 is a high-current, fast-response regulator which can maintain output voltage regulation with an extremely low input to output voltage drop. Fabricated on a CMOS process, the device operates from two input voltages: VBIAS provides power for the internal bias and control circuits, as well as drive for the gate of the N-MOS power transistor, while VIN supplies power to the load. The use of an external bias rail allows the part to operate from ultra low VIN voltages. Unlike bipolar regulators, the CMOS architecture consumes extremely low quiescent current at any output load current. The use of an N-MOS power transistor results in wide bandwidth, yet minimum external capacitance is required to maintain loop stability.
The fast transient response of this device makes it suitable for use in powering DSP, Microcontroller Core voltages and Switch Mode Power Supply post regulators. The LP38856 is available in TO-220 and TO-263 5-Lead packages.
Dropout Voltage: 240 mV (typical) at 3A load current.
Low Ground Pin Current: 14 mA (typical) at 3A load current.
Shutdown Current: 1 µA (typical) IIN(GND) when EN pin is low.
Precision Output Voltage: ±1.0% for TJ = 25°C and ±2.0% for 0°C TJ +125°C, across all line and load conditions
Reliability Metrics
| Part Number |
Process |
EFR Reject |
EFR Sample Size |
PPM |
LTA Rejects |
LTA Device Hours |
FITS |
MTTF (Hours) |
| LP38856S-0.8 |
CS065 |
2 |
34108 |
59 |
0 |
3862000 |
1 |
1095853045 |
| LP38856S-1.2 |
CS065 |
2 |
34108 |
59 |
0 |
3862000 |
1 |
1095853045 |
| LP38856SX-0.8 |
CS065 |
2 |
34108 |
59 |
0 |
3862000 |
1 |
1095853045 |
| LP38856SX-1.2 |
CS065 |
2 |
34108 |
59 |
0 |
3862000 |
1 |
1095853045 |
| LP38856T-0.8 |
CS065 |
2 |
34108 |
59 |
0 |
3862000 |
1 |
1095853045 |
| LP38856T-1.2 |
CS065 |
2 |
34108 |
59 |
0 |
3862000 |
1 |
1095853045 |
Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.For more information on Reliability Metrics, please click here.
Design Tools
| Title |
Size in Kbytes |
Date |
|
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| How to Power Sub-Micron CMOS Loads with an Efficient LDO |
|
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View |
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If you have trouble printing or viewing PDF file(s), see Printing Problems.
|
Application Notes
| Title |
Size in Kbytes |
Date |
|
| AN-1479: Application Note 1479 LP38856S-1.2 Evaluation Board |
468 Kbytes |
3-Nov-06 |
Download |
AN-1479 (Chinese): Application Note 1479 LP38856S-1.2 Evaluation Board
|
230 Kbytes |
|
640){this.height=this.height*640/this.width;this.width=640;}' border="0" alt=" Connection Diagram"> |
If you have trouble printing or viewing PDF file(s), see Printing Problems.
|
More Application Notes
| Title |
Size in Kbytes |
Date |
|
| AN-1560: Application Note 1560 LP38852MR-ADJ Evaluation Board |
280 Kbytes |
17-Mar-07 |
Download |
AN-1560 (Chinese): Application Note 1560 LP38852MR-ADJ Evaluation Board
|
397 Kbytes |
|
640){this.height=this.height*640/this.width;this.width=640;}' border="0" alt=" Connection Diagram"> |
| AN-1504: Application Note 1504 LP38853S-ADJ Evaluation Board |
573 Kbytes |
13-Mar-07 |
Download |
AN-1504 (Chinese): Application Note 1504 LP38853S-ADJ Evaluation Board
|
285 Kbytes |
|
640){this.height=this.height*640/this.width;this.width=640;}' border="0" alt=" Connection Diagram"> |
| AN-1480: Application Note 1480 LP38859S-1.2 Evaluation Board |
522 Kbytes |
3-Nov-06 |
Download |
AN-1480 (Chinese): Application Note 1480 LP38859S-1.2 Evaluation Board
|
228 Kbytes |
|
640){this.height=this.height*640/this.width;this.width=640;}' border="0" alt=" Connection Diagram"> |
| AN-1815: Application Note 1815 LDOs Ease the Stress of Start-Up |
149 Kbytes |
23-Sep-08 |
Download |
If you have trouble printing or viewing PDF file(s), see Printing Problems.
|
LP38856 Data Sheet
