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LP2997

Features: Source and sink current Low output voltage offsetNo external resistors requiredLinear topology Suspend to Ram (STR) functionalityLow external component count Thermal ShutdownAvailable in SO-8, PSOP-8 packagesApplication DDR-II Termination VoltageSSTL-18 TerminationPinoutSpecifications ...

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SeekIC No. : 004398746 Detail

LP2997: Features: Source and sink current Low output voltage offsetNo external resistors requiredLinear topology Suspend to Ram (STR) functionalityLow external component count Thermal ShutdownAvailable in ...

LP2997 Data Sheet

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Part Number:
LP2997
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/22

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Product Details

Description



Features:

Source and sink current
Low output voltage offset
No external resistors required
Linear topology
Suspend to Ram (STR) functionality
Low external component count
Thermal Shutdown
Available in SO-8, PSOP-8 packages




Application

DDR-II Termination Voltage
SSTL-18 Termination




Pinout






Specifications

Input Min Voltage 2.2 Volt
Input Max Voltage 5.5 Volt
Output Current 500 mA
Standards DDR-II
External Components 3
Independent Power/Analog Rails Yes
On/Off Pin Yes
Reference Output 1.25 Volt
Thermal Protection Yes
Special Features Suspend to RAM shutdown
Error Flag No
Quiescent Current 0.32 mA
RegType LDO
Temperature Min 0 deg C
Temperature Max 125 deg C
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Description

The LP2997 linear regulator is designed to meet the JEDEC SSTL-18 specifications for termination of DDR-II memory. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 500mA continuous current and transient peaks up to 900mA in the application as required for DDR-II SDRAM termination. The LP2997 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.

An additional feature found on the LP2997 is an active low shutdown (SD#) pin that provides Suspend To RAM (STR) functionality. When SD# is pulled low the VTT output will tri-state providing a high impedance output, but, VREF will remain active. A power savings advantage can be obtained in this mode through lower quiescent current.

Reliability Metrics

Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
LP2997M CS065 2 34108 59 0 3862000 1 1095853045
LP2997MR CS065 2 34108 59 0 3862000 1 1095853045
LP2997MRX CS065 2 34108 59 0 3862000 1 1095853045
LP2997MX CS065 2 34108 59 0 3862000 1 1095853045

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.


More Application Notes

Title Size in Kbytes Date
AN-1241: Application Note 1241 LP2995 Evaluation Board 373 Kbytes 25-Sep-02 Download
AN-1268: Application Note 1268 LP2996 Evaluation Board 67 Kbytes 5-Dec-02 Download
AN-1813: Application Note 1813 LP2998 Evaluation Board 975 Kbytes 10-Mar-08 Download
AN-1254: Application Note 1254 DDR-SDRAM Termination Simplified Using a Linear Regulator 49 Kbytes 1-Oct-02 Download

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