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LP2996

Features: Source and sink currentLow output voltage offsetNo external resistors requiredLinear topologySuspend to Ram (STR) functionalityLow external component countThermal ShutdownAvailable in SO-8, PSOP-8 or LLP-16 packagesApplicationDDR-I and DDR-II Termination VoltageSSTL-2 and SSTL-3 Terminat...

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SeekIC No. : 004398745 Detail

LP2996: Features: Source and sink currentLow output voltage offsetNo external resistors requiredLinear topologySuspend to Ram (STR) functionalityLow external component countThermal ShutdownAvailable in SO-8...

LP2996 Data Sheet

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Part Number:
LP2996
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/25

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Product Details

Description



Features:

Source and sink current
Low output voltage offset
No external resistors required
Linear topology
Suspend to Ram (STR) functionality
Low external component count
Thermal Shutdown
Available in SO-8, PSOP-8 or LLP-16 packages




Application

DDR-I and DDR-II Termination Voltage
SSTL-2 and SSTL-3 Termination
HSTL Termination




Pinout






Specifications

PVIN, AVIN, VDDQ to GND..................................... −0.3V to +6V
Storage Temp. Range ....................................−65°C to +150°C
Junction Temperature ......................................................150°C
SO-8 Thermal Resistance (JA) ...................................151°C/W
PSOP-8 Thermal Resistance (JA)................................. 43°C/W
LLP-16 Thermal Resistance (JA) ..................................51°C/W
Lead Temperature (Soldering, 10 sec) ............................260°C
ESD Rating (Note 2) ............................................................1kV




Description

The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2996 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.

An additional feature found on the LP2996 is an active low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but, VREF will remain active. A power savings advantage can be obtained in this mode through lower quiescent current.






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