Features: Low output voltage offsetWorks with +5v, +3.3v and 2.5v rails Source and sink current Low external component count No external resistors required Linear topology Available in SO-8, PSOP-8 or LLP-16 packages Low cost and easy to useApplication DDR Termination Voltage SSTL-2 SSTL-3PinoutS...
LP2995: Features: Low output voltage offsetWorks with +5v, +3.3v and 2.5v rails Source and sink current Low external component count No external resistors required Linear topology Available in SO-8, PSOP-8...
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The LP2995 linear regulator is designed to meet the JEDECSSTL-2 and SSTL-3 specifications for termination of DDR-SDRAM. The device contains a high-speed operational am-plifier to provide excellent response to load transients. Theoutput stage prevents shoot through while delivering 1.5Acontinuous current and transient peaks up to 3A in theapplication as required for DDR-SDRAM termination. TheLP2995 also incorporates a VSENSE pin to provide superiorload regulation and a VREF output as a reference for thechipset and DDR DIMMS.
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