Features: Source and sink current Low external component count Independent analog and power rails Linear topology Small package SO-8 Low cost and easy to use Shutdown pinApplicationSSTL-2 SSTL-3 DDR-SDRAM Termination DDR-II TerminationPinoutSpecificationsPVIN, AVIN, VTT, VDDQ, SD to GND −0....
LP2994: Features: Source and sink current Low external component count Independent analog and power rails Linear topology Small package SO-8 Low cost and easy to use Shutdown pinApplicationSSTL-2 SSTL-3 DD...
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Source and sink current
Low external component count
Independent analog and power rails
Linear topology
Small package SO-8
Low cost and easy to use
Shutdown pin
The LP2994 regulator is designed to provide a linear solutionto meet the JEDEC SSTL-2 and SSTL-3 specifications (Se-ries Stub Termination Logic) for active termination of DDR-SDRAM. The device utilizes an internal operational amplifierto provide linear regulation of VTT without the need forexpensive externalcomponents. The output stage preventsshoot through while delivering 1.5A continuous current andmaintaining excellent load regulation. The LP2994 also in-corporates an active low shutdown pin to tri-state the outputduring Suspend To Ram (STR) states.
Patents Pending