Features: `20 ns Worst-Case Multiply Time`Low Power CMOS Technology`LMU08 Replaces TRW TMC208K`LMU8U Replaces TRW TMC28KU`Two's Complement (LMU08), or Unsigned Operands (LMU8U)`Three-State Outputs`Package Styles Available:• 40-pin PDIP• 44-pin PLCC, J-LeadSpecificationsStorage temperat...
LMU8U: Features: `20 ns Worst-Case Multiply Time`Low Power CMOS Technology`LMU08 Replaces TRW TMC208K`LMU8U Replaces TRW TMC28KU`Two's Complement (LMU08), or Unsigned Operands (LMU8U)`Three-State Outputs`P...
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The LMU08 and LMU8U are highspeed, low power 8-bit parallel multipliers. They are pin-for-pin equivalents with TRW TMC208K and TMC28KU type multipliers. Full military ambient temperature range operation is attained by the use of advanced CMOS technology. Both the LMU08 and the LMU8U produce the 16-bit product of two 8-bit numbers. The LMU08 accepts operands in two's complement format, and produces a two's complement result. The product is provided in two halves with the sign bit replicated as the most significant bit of both halves. This facilitates use of the LMU08 product as a double precision operand in 8-bit systems.
The LMU8U operates on unsigned data, producing an unsigned magnitude result. Both the LMU08 and the LMU8U feature independently controlled registers for both inputs and the product, which along with three-state outputs allows easy interfacing with microprocessor busses. Provision is made in the LMU08 and LMU8U for proper rounding of the product to 8-bit precision.
The round input is loaded at the rising edge of the logical OR of CLK A and CLK B for the LMU08.
The LMU8U latches RND on the rising edge of CLK A only. In either case, a '1' is added in the most significant position of the lower product byte when RND is asserted. Subsequent truncation of the least significant product byte results in a correctly rounded 8-bit result.