LM2524D

The LM2524D family is an improved version of the industry tandard LM3524. It has improved specifications and additional eatures yet is pin for pin compatible with existing 3524 amilies. New features reduce the need for additional external ircuitry often required in the original version.

The LM2524D has a ±1% precision 5V reference. The current arrying capability of the output drive transistors has een raised to 200 mA while reducing VCEsat and increasing CE breakdown to 60V. The common mode voltage range of he error-amp has been raised to 5.5V to eliminate the need or a resistive divider from the 5V reference.

In the LM2524D the circuit bias line has been isolated from he shut-down pin. This prevents the oscillator pulse amplitude nd frequency from being disturbed by shut-down. Also t high frequencies (@300 kHz) the max. duty cycle per output as been improved to 44% compared to 35% max. duty ycle in other 3524s.

In addition, the LM2524D can now be synchronized externally, hrough pin 3. Also a latch has been added to insure ne pulse per period even in noisy environments. The M3524D includes double pulse suppression logic that insures hen a shut-down condition is removed the state of he T-flip-flop will change only after the first clock pulse has rrived. This feature prevents the same output from being ulsed twice in a row, thus reducing the possibility of core aturation in push-pull designs.