Features: ` 160 Mbps @ 650 A TYP (MPL link)
` MPL-0 Meets MPL Physical Layer Specification
` Configurable as a Serializer or Deserializer
` Complete LVCMOS to MPL Translation
` Serializes 8-bit Camera Interface
- 8-bit color data
- plus VSYNC and HSYNC bits
` Link power down mode reduces quiescent power under ∼ 10 A (actual TBD)
` 1.7V3.1V and 2.9-3.1V Supply Voltage
` Interfaces to 1.8V3.0V Logic
` Offered in a small 24L UCSP Package
- 3.5 mm X 4.5 mm
- 0.6 mm Max HeightSpecificationsIf Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage (VDDA) .............................−0.3V to +TBDV
Supply Voltage (VDD) ...............................−0.3V to +TBDV
Supply Voltage (VDDIO) ...........................−0.3V to +TBDV
LVCMOS Input/Output Voltage..... −0.3V to (VDDIO+0.3V)
MPL Input/Output Voltage ........................................TBD
Junction Temperature .......................................+150°C
Storage Temperature ......................−65°C to +150°C
Lead Temperature Soldering,4 Seconds ...........+260°C
ESD Ratings:HBM, 1.5 k, 100pF ......................±2 kV
EIAJ, 0, 200 pF.............................................. ±200V
Maximum Package Power Dissipation Capacity at 25°C
24L UCSP Package ..............................................TBD W
Derate TBD Package above 25°C............. TBD mW/°C
DescriptionThe LM2501 device is a Serializer/Deserializer that adapts existing video busses to Mobile Pixel Link (MPL). MPL is intended to replace wide LVCMOS video interfaces inside portable electronics equipment benefiting their cost, size, EMI and power consumption.
Contained in a 24 lead Ultra CSP Package, the Serializer resides beside the video source (camera) and translates the
parallel bus from LVCMOS levels to serial MPL levels for transmission over a flex cable to the Deserializer located by the respective destination Video Input Port.
An extra clock transport is provided to deliver a clock signal to the target. For example, from the main board to the flip
board where the camera module is located. Transmission of the clock also benefits from MPL's low power transmission and low EMI.
The Power_Down (PD*) input controls the power state of the MPL interface. When PD* is asserted, the MD, MC and WC signals are powered down to save current and reduce power dissipation. A remote PD* output to also provided to control the video source.
LM2501 Data Sheet
