Features: `Three operating modes: 12-bit + sign, 8-bit + sign, and "watchdog" comparison mode
`Single-ended or differential inputs
`Built-in Sample-and-Hold
`Instruction RAM and event sequencer
`8-channel (LM12¿L"438) or 4-channel (LM12434) multiplexer
`32-word conversion FIFO
`Programmable acquisition times and conversion rates
`Self-calibration and diagnostic mode
`Power down output for system power management
`Read while convert capability for maximum through-put rateApplication·Data Logging
·Portable Instrumentation
·Process Control
·Energy Management
·RoboticsPinoutSpecificationsSupply Voltage (VA+ and VD+) 6.0V
Voltage at Input and Output Pins
except IN0±IN3 (LM12434) -0.3V to V+ + 0.3V
and IN0±IN7 (LM12{L}438)
Voltage at Analog Inputs IN0±IN3 (LM12434)
and IN0±IN7 (LM12{L}438) GND - 5V to V+ + 5V
|VA+ - VD+| 300 mV
|AGND - DGND| 300 mV
Input Current at Any Pin (Note 3) ±5 mA
Package Input Current (Note 3) ±20 mA
Power Dissipation (TA = 25) (Note 4)
V Package
WM Package
Storage Temperature -65 to +150
Soldering Information, Lead Temperature (Note 19)
V Package, Vapor Phase (60 seconds)
Infrared (15 seconds)
WM Package, Vapor Phase (60 seconds)
Infrared (15 seconds)
ESD Susceptibility (Note 5) 1.5 kVDescriptionThe LM12434 and LM12¿L"438 are highly integrated Data Acquisition Systems. Operating on 3V to 5V, they combine a fully-differential self-calibrating (correcting linearity and zero errors) 13-bit (12-bit a sign) analog-to-digital converter (ADC) and sample-and-hold (S/H) with extensive analog and digital functionality. Up to 32 consecutive conversions, using two's complement format, can be stored in an internal 32-word (16-bit wide) FIFO data buffer. An internal 8-word instruction RAM can store the conversion sequence for up to eight acquisitions through the LM12{L}438's eight-input multiplexer. The LM12434 has a four-channel multiplexer, a differential multiplexer output, and a differential S/H input. The LM12434 and LM12{L}438 can also operate with 8-bit a sign resolution and in a supervisory "watchdog" mode that compares an input signal against two programmable limits.
Acquisition times and conversion rates are programmable through the use of internal clock-driven timers. The differential reference voltage inputs can be externally driven for absolute or ratiometric operation.
All registers, RAM, and FIFO are directly accessible through the high speed and flexible serial I/O interface bus. The serial interface bus is user selectable to interface with the following protocols with zero glue logic: MICROWIRE/ PLUSTM, Motorola's SPI/QSPI, Hitachi's SCI, 8051 Family's Serial Port (Mode 0), I
2C and the TMS320 Family's Serial Port.
An evaluation kit for demonstrating the LM12434 and LM12{L}438 is available.