DescriptionThe LM1100XJ is designed as one member of the full size HCMOS/TTL compatible oscillators.LM1100XJ has four features. (1)HCMOS/TTL output. (2)5.0V supply voltage. (3)14 pin DIP package. (4)Gull wing/ J-lead option. Those are all the main features.Some important electrical characteristics...
LM1100XJ: DescriptionThe LM1100XJ is designed as one member of the full size HCMOS/TTL compatible oscillators.LM1100XJ has four features. (1)HCMOS/TTL output. (2)5.0V supply voltage. (3)14 pin DIP package. (4...
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The LM1100XJ is designed as one member of the full size HCMOS/TTL compatible oscillators.
LM1100XJ has four features. (1)HCMOS/TTL output. (2)5.0V supply voltage. (3)14 pin DIP package. (4)Gull wing/ J-lead option. Those are all the main features.
Some important electrical characteristics of LM1100XJ are concluded as follow. It has two parts. The first parts is about the frequency which would be from 300KHz to 40MHz. (1)For the first part, its frequency stability would be +/-25ppm or +/-50ppm or +/-100pm. (2)Its operating temperature range would be from 0°C to 70°C for TTL and would be from -20°C to 70°C for CMOS. (3)Its storage temperature range would be from -55°C to 125°C. (4)Its input voltage would be +5.0Vdc +/-10%. (5)Its input current would be max 30mA. (6)Its symmetry would be 40/60% to 60/40% or 45/55% to 55/45% at 1.4V or 1/2Vdd. (7)Its rise/fall time would be 5ns max for TTL and would be 6ns max for CMOS. (8)Its output TTL low level would be max 0.4V. (9)Its output TTL high level would be min 2.4V. (10)Its output CMOS low level would be max 0.5V. (11)Its output CMOS high level would be Vdd-0.5V min. (12)Its output load would be CMOS, compatible, 1 to 10 TTL gates.
Also the second part from 40MHz to 175MHz of LM1100XJ are concluded as follow. (1)For the first part, its frequency stability would be +/-25ppm or +/-50ppm or +/-100pm. (2)Its operating temperature range would be from 0°C to 70°C for TTL and would be from -20°C to 70°C for CMOS. (3)Its storage temperature range would be from -55°C to 125°C. (4)Its input voltage would be +5.0Vdc +/-10%. (5)Its input current would be max 40mA. (6)Its symmetry would be 40/60% to 60/40% or 45/55% to 55/45% at 1.4V or 1/2Vdd. (7)Its rise/fall time would be 5ns max for TTL and would be 6ns max for CMOS. (8)Its output TTL low level would be max 0.4V. (9)Its output TTL high level would be min 2.4V. (10)Its output CMOS low level would be max 0.5V. (11)Its output CMOS high level would be Vdd-0.5V min. (12)Its output load would be CMOS, compatible, 1 to 10 TTL gates. Almost the same as the first part. And so on. If you have any question or suggestion or want to know more information please contact us for details. Thank you!