LF43891

Features: ` 30 MHz Maximum Sampling Rate` 320 MHz Multiply-Accumulate Rate` 8 Filter Cells` 8-bit Unsigned or 9-bit Two's Complement Data/Coefficients` 26-bit Data Outputs` Shift-and-Add Output Stage for Combining Filter Outputs` Expandable Data Size, Coefficient Size, and Filter Length` User-Sele...

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LF43891 Picture
SeekIC No. : 004393792 Detail

LF43891: Features: ` 30 MHz Maximum Sampling Rate` 320 MHz Multiply-Accumulate Rate` 8 Filter Cells` 8-bit Unsigned or 9-bit Two's Complement Data/Coefficients` 26-bit Data Outputs` Shift-and-Add Output Stag...

floor Price/Ceiling Price

Part Number:
LF43891
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

` 30 MHz Maximum Sampling Rate
` 320 MHz Multiply-Accumulate Rate
` 8 Filter Cells
` 8-bit Unsigned or 9-bit Two's Complement Data/Coefficients
` 26-bit Data Outputs
` Shift-and-Add Output Stage for Combining Filter Outputs
` Expandable Data Size, Coefficient Size, and Filter Length
` User-Selectable 2:1, 3:1, or 4:1 Decimation
` Replaces Harris HSP43891
` 84-pin PLCC, J-Lead



Pinout

  Connection Diagram


Specifications

Storage temperature .......................................................65 to +150
Operating ambient temperature .......................................55 to +125
VCC supply voltage with respect to ground ..................... 0.5 V to +7.0 V
Input signal with respect to ground ........................ 0.5 V to VCC + 0.5 V
Signal applied to high impedance output ................ 0.5 V to VCC + 0.5 V
Output current into low outputs .........................................................25 mA
Latchup current ............................................................................. > 400 mA



Description

The LF43891 is a video-speed digital filter that contains eight filter cells (taps) cascaded internally and a shiftand- add output stage. A 9 x 9 multiplier, three decimation registers, and a 26-bit accumulator are contained in each filter cell. The output stage of the LF43891 contains a 26-bit accumulator which can add the contents of any filter stage to the output stage accumulator shifted right by 8 bits. 8-bit unsigned or 9-bit two's complement format for data and coefficients can be independently selected.

Expanded coefficients and word sizes can be processed by cascading multiple LF43891s to implement larger filter lengths without affecting the sample rate. By reducing the samplerate, a single LF43891 can process
larger filter lengths by using multiple passes. The sampling rate can range from 0 to 40 MHz. Over 1000 taps may be processed without overflows due to the architecture of the device.

The output sample rate can be reduced to one-half, one-third, or onefourth the input sample rate by using the three decimation registers contained in every filter cell. Matrix multiplication, N x N spatial correlations/ convolutions, and other 2-D operations for image processing can also be achieved using these registers.




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