Features: Flash ROM• Single 5V power supply, on-board writeable• Block erase in 128 byte units• 196608 × 8 bits (LC87F06J2A)RAM• 8192 × 9 bitsBus Cycle Time• 66.6ns (15MHz, 1/1 frequency division ratio )Note: Bus cycle time indicates the speed to read ROM.PinoutSpecif...
LC87F06J2A: Features: Flash ROM• Single 5V power supply, on-board writeable• Block erase in 128 byte units• 196608 × 8 bits (LC87F06J2A)RAM• 8192 × 9 bitsBus Cycle Time• 66.6ns (15...
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Absolute maximum ratings | |
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ROM [bits] | 192K×8 |
RAM [bits] | 8192×9 |
Number of PWM outputs | 4 |
Operating supply voltage range VDD [V] | 2.7 to 5.5 |
Minimum cycle time [µs] | 0.20(15MHz) |
Internal oscillation circuits | Medium-speed RC, Frequency variable RC |
External oscillation circuits | Low speed crystal, Hi-speed CF |
Ports: Number of pins: Total | 84 |
Interrupts | 36 sources, 10 vector addresses |
Synchronous SIO | 4 |
Asynchronous/synchronous SIO | 1 |
Number of UART | 2 |
Serial I/O | Synchronous: Two 8-bit channels with automatic transfer support, Asynchronous/synchronous: One 8-bit channel with bus support |
Maximum number of timers | Ten 8-bit timers, One clock time base timer |
A/D converter | 8bit ×16 |
The SANYO LC87F06J2A is an 8-bit microcomputer that, centered around a CPU running at a minimum bus cycle time of 66.6ns, integrate on a single chip a number of hardware features such as 192K-byte flash ROM (onboardewritable), 8K-byte RAM, Onchip debugging function, two sophisticated 16-bit timers/counters (may be divided into 8-bit timers), a 16-bit timer with a prescaler (may be divided into 8-bit timers), four 8-bit timers with a prescaler, a base timer serving as a time-of-day clock, two synchronous SIO ports (with automatic block transmission/reception capabilities), an asynchronous/synchronous SIO port, two synchronous SIO ports, two UART ports (full duplex), four 12-bit PWM channels, VPS/PDC/PAL-WSS • XDS • EPG-J • VBID(Video-ID) Data-slicer, an universal remote control transmitter, an 8-bit 16-channel AD converter, a high-speed clock counter, a system clock frequency divider, and a 36-source 10- ector interrupt, ROM correction function feature.