LC877280B Selling Leads, Price trend, LC877280B DataSheet download, circuit diagram from SeekIC.com

Features: ` Read-Only Memory (ROM) - 131072 * 8bits (LC8772C8B) - 114688 * 8bits (LC8772B2B) - 98304 * 8bits (LC877296B) -81920 * 8bits (LC877280B)` Random Access Memory (RAM): 2048 * 9 bits (LC8772C8B, LC8772B2B, LC877296B, LC877280B)` Minimum Bus Cycle Time: 100 ns (10 MHz) Note: The bus cycle t...

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Description

Features:

` Read-Only Memory (ROM)
   - 131072 * 8bits (LC8772C8B)
   - 114688 * 8bits (LC8772B2B)
   - 98304 * 8bits (LC877296B)
   - 81920 * 8bits (LC877280B)
` Random Access Memory (RAM): 2048 * 9 bits (LC8772C8B, LC8772B2B, LC877296B, LC877280B)
` Minimum Bus Cycle Time: 100 ns (10 MHz)
    Note: The bus cycle time indicates ROM read time.
` Minimum Instruction Cycle Time: 300 ns (10MHz)
` Ports
   - Input/output ports
     Data direction programmable for each bit individually : 26 (P1n, P30-P35, P70-P73, P8n)
     Data direction programmable in nibble units :                8 (P0n)
     (When N-channel open drain output is selected, data can be input in bit units.)
   - Input ports :                                                                   2 (XT1,XT2)
   - LCD ports
     Segment output :                                                           48 (S00-S47)
     Common output :                                                            4 (COM0-COM3)
     Bias terminals for LCD driver                                           3 (V1-V3)
     Other functions
     Input/output ports :                                                       48(PAn,PBn,PCn,PDn,PEn,PFn)
     Input ports :                                                                    7 (PLn)
   - Oscillator pins :                                                               2 (CF1,CF2)
   - Reset pin :                                                                     1 (RES )
   - Power supply :                                                              6 (VSS1-3,VDD1-3)
` LCD controller
   - Seven display modes are available (static, 1/2, 1/3, 1/4 duty * 1/2, 1/3 bias)
   - Segment output and common output can be switched to general purpose input/output ports.
` Small signal detection (MIC signals etc)
   - Counts pulses with the level which is greater than a preset value
   - 2 bit counter
` Timers
   - Timer 0: 16 bit timer / counter with capture register
      Mode 0: 2 channel 8-bit timer with programmable 8 bit prescaler and 8 bit capture register
      Mode 1: 8 bit timer with 8 bit programmable prescaler and 8 bit capture register + 8 bit
      Counter with 8-bit capture register
      Mode 2: 16 bit timer with 8 bit programmable prescaler and 16 bit capture register
      Mode 3: 16 bit counter with 16 bit capture register
   - Timer 1: PWM / 16 bit timer with toggle output function
      Mode 0: 2 channel 8 bit timer (with toggle output)
      Mode 1: 2 channel 8 bit PWM
      Mode 2: 16 bit timer (with toggle output) Toggle output from lower 8 bits is also possible.
      Mode 3: 16 bit timer (with toggle output) Lower order 8 bits can be used as PWM.
   - Base Timer
     1) The clock signal can be selected from any of the following :
         Sub-clock (32.768kHz crystal oscillator), system clock, and prescaler output from timer 0
     2) Interrupts of five different time intervals are possible.
` Serial-interface
   - SIO 0: 8 bit synchronous serial interface
     1) LSB first / MSB first is selectable
     2) Internal 8 bit baud-rate generator (fastest clock period 4 / 3 Tcyc)
     3) Consecutive automatic data communication (1-256 bits)
   - SIO 1: 8 bit asynchronous / synchronous serial interface
     Mode 0: Synchronous 8 bit serial IO (2-wire or 3-wire, transmit clock 2512 Tcyc)
     Mode 1: Asynchronous serial IO (half duplex, 8 data bits, 1 stop bit, baud rate 82048Tcyc)
     Mode 2: Bus mode 1 (start bit, 8 data bits, transmit clock 2512 Tcyc)
     Mode 3: Bus mode 2 (start detection, 8 data bits, stop detection)
` AD converter
   -8 bits * 12 channels
` Remote control receiver circuit (connected to P73 / INT3 / T0IN terminal)
   -Noise rejection function (noise rejection filter's time constant can be selected from 1 / 32 / 128 Tcyc)
` Watchdog timer
   - The watching time period is determined by an external RC.
   - Watchdog timer can produce interrupt or system reset
` Interrupts: 14 sources, 10 vectors
     1) Three priority (low, high and highest) multiple interrupts are supported. During interrupt handling, an equal or
lower priority interrupt request is postponed.
     2) If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes precedence.
        In the case of equal priority levels, the vector with the lowest address takes precedence.
• Priority Level : X > H > L
• For equal priority levels, vector with lowest address takes precedence.
` Subroutine stack levels: 1024 levels max. Stack is located in RAM.
` Multiplication and division
   - 16 bit * 8 bit (executed in 5 cycles)
   - 24 bit * 16 bit (12 cycles)
   - 16 bit ÷ 8 bit (8 cycles)
   - 24 bit ÷ 16 bit (12 cycles)
` Oscillation circuits
   - On-chip RC oscillation for system clock use.
   - CF oscillation for system clock use. (Rf built in, Rd external)
   - Crystal oscillation low speed system clock use. (Rf built in, Rd external)
` Standby function
   - HALT mode
     HALT mode is used to reduce power consumption. During the HALT mode, program execution is stopped but
peripheral circuits keep operating (some parts of serial transfer operation stop.)
     1) Oscillation circuits are not stopped automatically.
     2) Released by the system reset or interrupts.
   -HOLD mode
    HOLD mode is used to reduce power consumption. Program execution and peripheral circuits are stopped.
    1) CF, RC and crystal oscillation circuits stop automatically.
    2) Released by any of the following conditions.
       (1) Low level input to the reset pin
       (2) Specified level input to one of INT0, INT1, INT2
       (3) Port 0 interrupt
   -X'tal HOLD made
    X'tal HOLD mode is used to reduce power consumption. Program execution is stopped.
    All peripheral circuits except the base timer are stopped.
     1) CF and RC oscillation circuits stop automatically.
     2) Crystal oscillator operation is kept in its state at HOLD mode inception.
     3) Released by any of the following conditions
        (1) Low level input to the reset pin
        (2) Specified level input to one of INT0, INT1, INT2
        (3) Port 0 interrupt
       (4) Base-timer interrupt
` Package
   - QIP100E
   - SQFP100
` Development tools
   - Evaluation chip : LC876096
   - Emulator: EVA62S + ECB876500 (Evaluation chip board) + SUB877200 + POD100QFP or POD100SQFP (Type B)
   - Flash ROM version: LC87F72C8A

Pinout

Connection Diagram

Specifications

Parameter		Symbol	Pins	Conditions		Ratings			unit
Parameter		Symbol	Pins	Conditions	VDD_[V]	min.	typ	max.	unit
Maximum supply voltage		VDDMAX	VDD1,VDD2, VDD3	VDD1=VDD2=VDD3		-0.3		+7.0	V
Supply voltage for LCD		VLCD	V1/PL4, V2/PL5, V3/PL6	VDD1=VDD2=VDD3		-0.3		VDD
Input voltage		VI	Port L XT1,XT2,CF1, RES			-0.3		VDD+0.3
Input/output voltage		VIO(1)	•Port0, 1, 3, 7, 8 •Port A, B, C, D, E, F			-0.3		VDD+0.3
High level output current	Peak output current	IOPH(1)	Ports 0,1, 3	•CMOS output selected •Current at each pin.		-10			mA
		IOPH(2)	Port71,72,73	Current at each pin		-3
		IOPH(3)	Port A, B, C, D, E, F	Current at each pin		-5
	Total output current	IOAH(1)	Port 0, 1, 32, 33, 34, 35	Total of all pins		-40
		IOAH(2)	Port 30,31	Total of all pins.		-10
		IOAH(3)	Port 7	Total of all pins		-5
		IOAH(4)	Port A, B, C	Total of all pins		-25
		IOAH(5)	Port D, E, F	Total of all pins		-25
Low level output current	Peak output curren	IOPL(1)	Port 0, 1, 32-35	Current at each pin				30
		IOPL(2)	Port 30, 31	Current at each pin				20
		IOPL(3	Port 7, 8	Current at each pin				5
		IOPL(4)	Port A, B,C, D, E, F	Current at each pin				15
	Total output current	IOAL(1)	Port 0, 1, 32, 33, 34, 35	Total of all pins				60
		IOAL(2)	Ports 30,31	Total of all pins				60
		IOAL(3)	Port 7,8	Total of all pins				20
		IOAL(4)	Port A,B,C	Total of all pins				40
		IOAL(5)	Port D, E, F	Total of all pins				40
Maximum power dissipation		Pdmax	QIP100E	Ta=-30 to+70°C					mW
			SQFP100
			SQFP100
Operating temperature range		Topr				-30		70
Storage temperature range		Tstg				-55		125

Description

The LC8772C8B, LC8772B2B LC877296B and LC877280B are 8 bit single chip microcontrollers with the following on-chip functional blocks :
   - CPU: operable at a minimum bus cycle time of 100 ns
   - On-chip ROM Maximum Capacity : LC8772C8B 128K bytes
                                                          LC8772B2B 112K bytes
                                                          LC877296B 96K bytes
                                                          LC877280B 80K bytes
   - On-chip RAM capacity: 2048 bytes
   - LCD controller / driver
   - 16 bit timer / counter (can be divided into two 8 bit timers)
   - 16 bit timer / PWM (can be divided into two 8 bit timers)
   - Timer for use as date / time clock
   - Synchronous serial I/O port (with automatic block transmit / receive function)
   - Asynchronous / synchronous serial I/O port
   - 12-channel × 8-bit AD converter
   - Small signal detector
   - 14-source 10-vectored interrupt system

All of the above functions are fabricated on a single chip.

LC877280B

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