LC866424B Selling Leads, Price trend, LC866424B DataSheet download, circuit diagram from SeekIC.com

Features: ` Read-Only Memory (ROM) : LC866448B 49152 * 8 bits : LC866444B 45056 * 8 bits : LC866440B 40960 * 8 bits : LC866436B 36864 * 8 bits : LC866432B 32768 * 8 bits : LC866428B 28672 * 8 bits : LC866424B 24576 * 8 bits : LC866420B 20480 * 8 bits : LC866416B 16384 * 8 bits : LC866412B 12288 * ...

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Description

Features:

` Read-Only Memory (ROM) : LC866448B 49152 * 8 bits
                                             : LC866444B 45056 * 8 bits
                                             : LC866440B 40960 * 8 bits
                                             : LC866436B 36864 * 8 bits
                                             : LC866432B 32768 * 8 bits
                                             : LC866428B 28672 * 8 bits
                                             : LC866424B 24576 * 8 bits
                                             : LC866420B 20480 * 8 bits
                                             : LC866416B 16384 * 8 bits
                                             : LC866412B 12288 * 8 bits
                                             : LC866408B 8192 * 8 bits
` Random Access Memory (RAM) : LC866448B/44B/40B/36B 1152 * 8 bits
                                                    : LC866432B/28B/24B 768 * 8 bits
                                                    : LC866420B/16B 640 * 8 bits
                                                    : LC866412B/08B 512 * 8 bits
` Bus Cycle Time/Instruction Cycle Time
   The LC866448B/44B/40B/36B/32B/28B/24B/20B/16B/12B/08B are constructed to read ROM twice within one instruction cycle. It has 1.7 times more performance capability within the same instruction cycle compared to our 4-bit microcomputers (LC66000 series).
   Bus cycle time indicates the speed to read ROM.
`Ports
   - Input/output ports : 1 port (8 terminals : port 1)
     Input/output programmable in a bit
   - 15V withstand Input/Output ports : 2 ports (12 terminals)
     Input/output port programmable in nibble unit : 1 port (8 terminals : port 0)
     (When the N-channel open drain output is selected, the data in a bit can be inputted.)
     Input/output port programmable in a bit : 1 port (4 terminals : port 3)
   - Input port : 2 ports (14 terminals : port 7,8)
   - VFD output port : 38 terminals
     Large current output for digit : 16 terminals
    Pull-down resistor option available
  - Other function
    Input/output port : 1 port (6 terminals : port E)
    Input port : 2 ports (16 terminals : port C,D)
` VFD automatic dislay controller
    -Segment/digit output pattern programmable
     Any segment/digit combination available
     VFD parallel-drive available
   - 16-step dimmer function available
` AD converter
   - 8-channel * 8-bit AD converter
` Serial-interface
   - 1 channel * 16-bit serial-interface circuits
   - 1 channel * 8-bit serial-interface circuits
   - LSB first / MSB first function available
   - Internal 8-bit baud-rate generator in common with two serial-interface circuits
` Timer
   - Timer 0
     16-bit timer/counter
     2-bit prescaler + 8-bit programmable prescaler
        Mode 0 : Two 8-bit timers with programmable prescaler
        Mode 1 : 8-bit timer with programmable prescaler + 8-bit counter
        Mode 2 : 16-bit timer with programmable prescaler
        Mode 3 : 16-bit counter
           The resolution of Timer is tCYC. (tCYC: cycle time)
   - Timer 1
     16-bit timer/PWM
       Mode 0 : Two 8-bit timers
       Mode 1 : 8-bit timer + 8-bit PWM
       Mode 2 : 16-bit timer
       Mode 3 : Variable-bit PWM (9-16 bits)
          In Mode 0 and Mode 1,the resolution of Timer and PWM is tCYC.
          In Mode 2 and Mode 3,the resolution of Timer and PWM selectable: tCYC or 1/2 tCYC by program
   - Base timer
     Every 500ms overflow system for a clock application (using 32.768kHz crystal oscillation for Base timer clock)
     Every 976s, 3.9ms, 15.6ms, 62.5ms overflow system (using 32.768kHz crystal oscillation for Base timer clock)
    The Base timer clock selectable; 32.768kHz crystal oscillation, System clock, and programmable prescaler output of
    Timer 0
` Buzzer output
   - The Buzzer sound frequency selectable; 4KHz, 2KHz (using 32.768kHz crystal oscillation for Base timer clock)
` Remote-control receiver circuit (Shares with the P73/INT3/T0IN terminal)
   - Noise Rejection function (the time constant of noize rejection filter: 1tCYC/16tCYC/64tCYC)
    (tCYC: instruction cycle time)
   -  Switch Polarity function
` Watchdog timer
   - The watchdog timer is taken on RC outside
   - Watchdog timer operation selectable: interrupt system, system reset
` Interrupt system
   - 14-source 10-vectored interrupts :
     1. External interrupt INT0 (include watchdog timer)
     2. External interrupt INT1
     3. External interrupt INT2, Timer/counter T0L (Lower 8-bit)
     4. External interrupt INT3, Base timer
     5. Timer/counter T0H (Upper 8-bit)
     6. Timer T1L, Timer T1H
     7. Serial-interface SIO0
     8. Serial-interface SIO1
     9. AD converter
    10. VFD automatic display controller, Port 0
   - Built-in Interrupt Priority control register
     Microcontroller allows 3 levels of interrupt; low level, high level, and highest level of multiplex interrupt. It can specify a low level or a high level interrupt priority from INT2/T0L through port 0 (i.e. the above interrupt number from three through ten). It can also specify a low level or the highest level interrupt priority to INT0 and INT1.
` Real-time service operation
    The Real-Time Service (RTS) functions the 4-byte data-transfer between the Special Function Registers at acknowledging the interrupt request.
   The RTS starts within 1 instruction cycle-time and completes within 5 instructions cycle-time after occurring the interrupt request.
` Subroutine stack levels
   - 128 levels (Max.): Stack area included in RAM area
` Multiplication and division
    16-bit * 8-bit (7 instruction cycle times)
    16-bit / 8-bit (7 instruction cycle times)
` Three oscillation circuits
   - On-chip RC oscillation circuit using for the system clock.
   - On-chip CF oscillation circuit using for the system clock.
   - On-chip crystal oscillation circuit using for the system clock and for time-base clock.
` Standby function
   - HALT mode function
   The HALT mode is used to reduce power dissipation. In this operation mode, program execution is stopped. This operation mode can be released by interrupt request signals or the initial system reset request signal.
   - HOLD mode function
   The HOLD mode is used to freeze all the oscillations;RC (internal), CF and Crystal oscillations. This mode can be released by the following operations.
    • Reset terminal ( RES ) set to Low level
    • P70/INT0/T0IN, P71/INT1/T0IN terminals set to assigned level (programmable)
    • Input a Port 0 interrupt condition
` Factory shipment
    • QFP80E delivery form
` Development support tools
    Evaluation (EVA) chip : LC866097
    EPROM version : LC86E6449
    One time version : LC86P6449
    Emulator : EVA-86000 + ECB866400 (Evaluation chip board) + POD866400 (POD)

Pinout

Connection Diagram

Specifications

Parameter		Symbol	Pins	Conditions		Ratings			unit
Parameter		Symbol	Pins	Conditions	VDD[V]	min.	typ	max.	unit
Maximum supply voltage		VDD max	VDD1,VDD2	VDD1=VDD2		-0.3		+7.0	V
Input voltage		VI(1)	•Ports 71,72,73 •Ports 74,75 •Port 8 •RES			-0.3		VDD+0.3
Input voltage		VI(2)	VP			VDD-45		VDD+0.3
output voltage		VO	S0/T0 to S15/T15			VDD-45		VDD+0.3
Input/Output voltage		VIO(1)	•Port 1 •Port 70 •Ports 0, 3 at CMOS output option			-0.3		VDD+0.3
		VIO(2)	Ports 0, 3 at N-ch open drain output option			-0.3		15
		VIO(3)	S16 to S37			VDD-45		VDD+0.3
High level output current	Peak output current	IOPH(1)	Ports 0, 1, 3	•CMOS output •At each pins		-10			mA
		IOPH(2)	S0/T0 to S15/T15	At each pins		-30
		IOPH(3)	S16 to S37	At each pins		-15
	Total output current	IOAH(1)	Ports 0, 1, 3	The total of all pins		-30
		IOAH(2)	S0/T0 to S15/T15	The total of all pins		-55
		IOAH(3)	S16 to S37	The total of all pins		-115
Low level output current	Peak output curren	IOPL(1)	Ports 0, 1, 3	At each pins				20
	Peak output curren	IOPL(2)	Ports 70	At each pins				15
	Total output current	IOAL(1)	Ports 0	The total of all pins				40
	Total output current	IOAL(2)	Ports 1,3	The total of all pins				40
Maximum power dissipation		Pdmax	QFP80E	Ta=-30 to+70°C				480	mW
Operating temperature range		Topr				-30		70
Storage temperature range		Tstg				-55		125

Description

The LC866424B microcontrollers are 8-bit single chip microcontrollers with the following on-chip functional blocks:
   - CPU : Operable at a minimum bus cycle time of 0.5s (microsecond)
   - On-chip ROM Maximum Capacity : 48K bytes
   - On-chip RAM Capacity : 1152/768/640/512 bytes (LC866448B/44B/40B/36B/32B/28B/24B/20B/16B/12B/08B)
   - 16-bit timer /counter (or two 8-bit timers)
   - 16-bit timer /PWM (or two 8-bit timers)
   - 8-channel * 8-bit AD converter
   - Two 8-bit synchronous serial-interface circuits (1-channel * 16bit, 1-channel * 8bit)
   - 14-source 10-vectored interrupt system

All of the above functions are fabricated on a single chip.

LC866424B

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