Features: • VICS scrambled/unscrambled recognition circuit• Dedicated VICS descrambler circuit• CPU interface circuit (CCB: serial)PinoutSpecifications Parameter Symbol Conditions Ratings Unit Maximum supply voltage VDDmax VDD 0.3 to +7.0 V Inpu...
LC80101M: Features: • VICS scrambled/unscrambled recognition circuit• Dedicated VICS descrambler circuit• CPU interface circuit (CCB: serial)PinoutSpecifications Parameter Symbol ...
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Parameter |
Symbol |
Conditions |
Ratings |
Unit |
Maximum supply voltage |
VDDmax |
VDD |
0.3 to +7.0 |
V |
Input voltage | VIN1 | The CL2, CE2, DI2, RST2, BACKUP, INT-R1, and DI1 pins | 0.3 to +7.0 |
V |
VIN2 |
Input pins other than VIN1 |
0.3 to VDD +0.3 |
V | |
Output voltage | VOUT1 | The DO2 pin | 0.3 to +7.0 |
V |
VOUT2 | Output pins other than VOUT1 | 0.3 to VDD +0.3 |
V | |
Allowable power dissipation |
Pd max |
Ta 85°C |
200 |
mA |
Operating temperature |
Topr |
40 to +85 |
°C | |
Storage temperature |
Tstg |
55 to +125 |
°C |
The LC80101M is a special-purpose descrambler LSI for use in VICS systems. FM multiplexed service data that has had VICS center scrambling applied can be descrambled and received by inserting this LSI in the serial interface between the LC72700E and the application CPU. This architecture also supports reception of regular transmissions that have not been scrambled. Note that sample evaluation and product manufacture using this LSI require a contract with the VICS Center organization.