Features: • MSK delay detection circuit based on a 1T delay• Error correction function based on a 2T delay (in the MSK detector stage)• Digital PLL based clock regeneration circuit• Shift-register type 1T and 2T delay circuits• Block and frame synchronization detectio...
LC72706E: Features: • MSK delay detection circuit based on a 1T delay• Error correction function based on a 2T delay (in the MSK detector stage)• Digital PLL based clock regeneration circuit...
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Parameter |
Symbol |
Conditions |
Ratings |
Unit |
Maximum supply voltage |
VDD max |
0.3 to +7.0 |
V | |
Input voltage |
VIN 1 |
CE, CL, DI, RST, STNBY |
0.3 to +7.0 |
V |
VIN 2 |
Pins other than VIN1 |
0.3 to VDD + 0.3 |
V | |
Output voltage |
VOUT 1 |
DO |
0.3 to +7.0 |
V |
VOUT 2 |
Pins other than VOUT1 |
0.3 to VDD + 0.3 |
V | |
Output current |
IOUT |
BLOCK, FLOCK, DO |
0 to 4.0 |
mA |
Allowable power dissipation |
Pd max |
Ta 85°C |
400 |
mW |
Operating temperature |
Topr |
-40to+85 |
°C | |
Storage temperature |
Tstg |
-55to+125 |
°C |
The LC72706E is a data demodulation IC for receiving FM multiplex broadcasts for mobile receivers in the DARC format. In conjunction with a bandpass filter IC (either the LV3400M or the LV3403M), the LC72706E can form a compact yet high-functionality FM multiplex reception system. This IC supports all the FM multiplex frame structures (methods A, B, and C) in the ITU-R recommendations.