CPLD - Complex Programmable Logic Devices 400MHZ 128 Macrocell 3.3 V 7.5 tPD
LC4128V-75TN100C: CPLD - Complex Programmable Logic Devices 400MHZ 128 Macrocell 3.3 V 7.5 tPD
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Memory Type : | EEPROM | Number of Macrocells : | 128 |
Number of Product Terms per Macro : | 80 | Maximum Operating Frequency : | 333 MHz |
Delay Time : | 2.7 ns | Number of Programmable I/Os : | 64 |
Operating Supply Voltage : | 3.3 V | Supply Current : | 12 mA |
Maximum Operating Temperature : | + 90 C | Minimum Operating Temperature : | 0 C |
Package / Case : | TQFP-100 |
The LC4128V-75TN100C is designed as one kind of 3.3V/2.5V/1.8V in-system programmable superFAST high density PLD device that combines high speed and low power with the flexibility needed for ease of design and offers densities ranging from 32 to 512 macrocells.
Features of the LC4128V-75TN100C are:(1)I/O pins with fast setup path; (2)Lead-free package options; (3)Superior solution for power sensitive consumer applications; (4)Operation with 3.3V, 2.5V or 1.8V LVCMOS I/O; (5)Operation with 3.3V (4000V), 2.5V (4000B) or 1.8V (4000C/Z) supplies; (6)5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI interfaces; (7)Hot-socketing; (8)Open-drain capability; (9)Input pull-up, pull-down or bus-keeper; (10)Programmable output slew rate; (11)3.3V PCI compatible; (12)IEEE 1149.1 boundary scan testable; (13)Up to four global OE controls; (14)Individual local OE control per I/O pin.
The absolute maximum ratings of the LC4128V-75TN100C can be summarized as:(1)Supply Voltage (VCC): -0.5 to 5.5V;(2)Output Supply Voltage (VCCO): -0.5 to 4.5V;(3)Input or I/O Tristate Voltage Applied: -0.5 to 5.5V;(4)Storage Temperature: -65 to 150°C;(5)Junction Temperature (Tj) with Power Applied: -55 to 150°C. If you want to know more information about it, please download the datasheet in www.seekic.com or www.chinaicmart.com .