Features: • 131072 words * 8 bits organization• Power supplyLC371100SP, SM, ST-10: 5.0 V ± 10%LC371100SP, SM, ST-20LV: 2.7 to 3.6 V• Fast access time (tAA, tCA)LC371100SP, SM, ST-10: 100 ns (max.)LC371100SP, SM, ST-20LV: 200 ns (max.)150 ns (VCC = 3.0 to 3.6 V)• Operating c...
LC371100SM: Features: • 131072 words * 8 bits organization• Power supplyLC371100SP, SM, ST-10: 5.0 V ± 10%LC371100SP, SM, ST-20LV: 2.7 to 3.6 V• Fast access time (tAA, tCA)LC371100SP, SM, ST-1...
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.
Features: • 131072 words * 8 bits organization• Power supplyLC371100SP, SM, ST-10: 5.0...
Features: • 131072 words * 8 bits organization• Power supplyLC371100SP, SM, ST-10: 5.0...
Characteristic |
Symbol |
Conditions | Ratings |
Unit |
Maximum supply voltage |
VCCmax |
0.3 to +7.0 |
V | |
Supply input voltage |
VIN |
0.3*2 to VCC + 0.3 |
V | |
Supply output voltage | VOUT |
0.3 to VCC + 0.3 |
V | |
Allowable power dissipation |
PDmax |
Ta = 25°C; Reference values for the SANYO DIP package |
1.0 |
W |
Operating Temperature |
TOPR |
0 to +70 |
°C | |
Storage and Junction Temperature |
TSTG |
55 to +125 |
°C |
Note: 1. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be restricted to Recommended
Operating Conditions.
2. VIN (min) = 3.0 V (pulse width ² 30 ns)
The LC371100SP, LC371100SM and LC371100ST are 131,072-word ´ 8-bit organization (1,048,576-bit) mask programmable read only memories.
The LC371100SP-10, LC371100SM-10 and LC371100ST-10 feature an access time of 100 ns, an OE access time of 40 ns, and a standby current of 30 A, and are optimal for use in 5-V systems that require high-speed access.
The LC371100SP-20LV, LC371100SM-20LV and LC371100ST-20LV feature an access time of 200 ns, an OE access time of 80 ns, and a standby current of 4 A. Additionally, they provide high-speed access in 3.3-V systems (3.0 to 3.6 V) with a 150-ns access time and a 60- ns OE access time.
These ROMs adopt the JEDEC standard pin assignment which allows them to replace EPROM easily. To prevent bus line collisions in multi-bus microcontroller systems, pin 24 can be mask programmed to be either active high or active low.