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L6254

PinoutSpecifications Symbol Parameter Value Unit VCC Maximum Supply voltage -0.5 to 14 V Vdd Maximum Logic supply -0.5 to 6 V Vin max Maximum digital input voltage Vdd +0.3V V Vin min Minimum digital input voltage GND - 0.3V V SP...

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L6254: PinoutSpecifications Symbol Parameter Value Unit VCC Maximum Supply voltage -0.5 to 14 V Vdd Maximum Logic supply -0.5 to 6 V Vin max Maximum digital in...

L6254 Data Sheet

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Part Number:
L6254
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Pinout

Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC
 Maximum Supply voltage
-0.5 to 14
V
Vdd
 Maximum Logic supply
-0.5 to 6
V
Vin max
 Maximum digital input voltage
Vdd +0.3V
V
Vin min
 Minimum digital input voltage
GND - 0.3V
V
SPINDLE Ipeak
 Spindle peak sink/source output current
2.1
A
VCM Ipeak
 VCM peak sink/source output current
1.6
A
Ptot (*)
 Maximum Total Power Dissipation
1.7
W
Tstg, Tj
 Maximum Storage/Junction Temperature
-40 to 150
°C



Description

The L6254 integrates into a single chip both spindle nd VCM controllers as well as power stages. the L6254 is designed for 12V disk drive application equiring up to 2.0A of spindle and 1.5A of CM peak currents.

A serial port with up to 25 MHz capability provides asy interface to the microprocessor. A register ontrolled Frequency Locked Loop (FLL) allows lexibility in setting the spindle speed. Integrated EMF processing, digital masking, digital delay, nd sequencing minimize the number of external omponents required.

Power On Reset (POR) circuitry is included. Upon etection of a low voltage condition, POR is asserted, he internal registers are reset, and spindle ower circuitry is tri-stated. The L6254  is rectified roviding power for actuator retraction ollowed by dynamic spindle braking.

The L6254 is built in BICMOS technology allowing ense digital/analog circuitry to be combined ith a high power DMOS output stage.




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