KM48V2100B

Features:

Fast Page Mode operation
Byte/Word Read/Write operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Self-refresh capability (L-ver only)
Fast parallel test mode capability
TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Available in Plastic SOJ and TSOP(II) packages
Single +5V..10% power supply (5V product)
Single +3.3V..0.3V power supply (3.3V product)


Pinout




Specifications

Parameter	Symbol	Rating		Units
		3.3V	5V
Voltage on any pin relative to VSS	VIN,VOUT	-0.5 to +4.6	-1.0 to +7.0	V
Voltage on VCCsupply relative to VSS	VCC	-0.5 to +4.6	-1.0 to +7.0	V
Storage Temperature	Tstg	-55 to +150	-55 to +150	..
Power Dissipation	PD	1	1	W
Short Circuit Output Current	IOS	50	50	mA

Description

This is a family of 2,097,152 x 8 bit Fast Page Mode CMOS DRAMs KM48V2100B. Fast Page Mode KM48V2100B offers high speed random access of memory cells within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K Ref.), access time (-5,-6 or -7), power consumption( Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CASbefore- RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 2Mx8 Fast Page Mode DRAM family KM48V2100B is fabricated using Samsung's advanced CMOS process to realize high band-width, low power consumption and high reliability.

KM48V2100B may be used as graphic memory unit for microcomputer, personal computer and portable machines.