PinoutSpecifications SYMBOL PARAMETER CONDITIONS MIN MAX UNIT VDD positive supply voltage -0.3 +7.0 V VI voltage on any input pin IZII > 500 VSS-0.8 VDD +0.8 V II current on any input pin - - 1 mA ...
KKF8594E: PinoutSpecifications SYMBOL PARAMETER CONDITIONS MIN MAX UNIT VDD positive supply voltage -0.3 +7.0 V VI voltage on any input pin IZII >...
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SYMBOL |
PARAMETER |
CONDITIONS |
MIN |
MAX |
UNIT |
VDD |
positive supply voltage |
-0.3 |
+7.0 |
V | |
VI |
voltage on any input pin |
IZII > 500 |
VSS-0.8 |
VDD +0.8 |
V |
II |
current on any input pin |
- |
- |
1 |
mA |
IO |
output current |
- |
- |
10 |
mA |
Tstg |
storage temperature range |
-65 |
+150 |
| |
Tamb |
ambient operating temperature range KKF8594E |
-40 |
+40 |
|
The KKF8594E is 4-Kbit (512 8-bit) floating gate electrically erasableprogrammable read only memory (PROM). By using an internal redundant storage code it is fault tolerant to single bit errors. This feature dramatically increases reliability compared to conventional R memories.
Power consumption is low due to the full S technology used. The programming voltage 1s generated on-chip, using voltage multiplier.
As data bytes are received and transmitted via the serial I2C-bus,apackage using eight pins is sufficient. Up to four KKF8594E devices may be connected to the Ic-bus. Chip select is accomplished by two address inputs.
Timing of the Erase/Write cycle is done internally, thus no external com- ponents are required. Pin 7 must be connected to either VDDor left open-circuit.
There is an option of using an external clock or timing the length of an Erase/Write cycle.
A write protection input (pin 1) allows disable of write-commands from the master by hardware signal.Whenpin1isHIGH and one of the upper 256 R cells is addressed, then the data bytes will not be acknowledged bythe KKF8594E and theR contents are not changed.