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KK74ACT323

Features: • TTL/NMOS Compatible Input Levels• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 4.5 to 5.5 V• Low Input Current: 1.0 A; 0.1 A @ 25°C• Outputs Source/Sink 24mAPinoutSpecifications Symbol Parameter Value Unit VCC DC ...

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SeekIC No. : 004385777 Detail

KK74ACT323: Features: • TTL/NMOS Compatible Input Levels• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 4.5 to 5.5 V• Low Input Current: 1.0 A; 0.1 A @ 25°C...

KK74ACT323 Data Sheet

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Part Number:
KK74ACT323
Supply Ability:
5000

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  • 1~5000
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Product Details

Description



Features:


• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 A; 0.1 A @ 25°C
• Outputs Source/Sink 24mA


Pinout

Connection Diagram


Specifications

Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V
VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
IIN DC Input Current, per Pin ±20 V
IOUT DC Output Current, per Pin ±50 mA
ICC DC Supply Current, VCC and GND Pins ±50 mA
PD Power Dissipation per Output Transistor 100 mW
PD Power Dissipation in Still Air, Plastic DIP+ SO Package+ 750
500		 mW
Tstg Storage Temperature -65 to +150
TL Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SO Package) 260
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C


Description

he KK74ACT323 is identical in pinout to the LS/ALS323, HC/HCT323. The KK74ACT323 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.

The KK74ACT323 features a multiplexed parallel input/output data port to achieve full 8-bit handling in a 20 pin  ackage. Due to the large output drive capability and the 3-state feature, this device is ideally suited for interface with bus lines in a bus-oriented system.

Two Mode-Select inputs and two Output Enable inputs are used to choose the mode of operation as listed in the  unction Table. Synchronous parallel loading is accomplished by taking both Mode-Select lines, S1 and S2, high. This  laces the outputs in the high-impedance state, which permits data applied to the data port to be clocked into the  egister. Reading out of the register can be accomplished when the outputs are enabled. The active-low synchronous eset overrides all other inputs.




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