KK74AC374

Features: • Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 µA; 0.1 µA @ 25• High Noise Immunity Characteristic of CMOS Devices• Outputs Source/Sink 24 mAPinoutSpecifications Symbol ...

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KK74AC374 Picture
SeekIC No. : 004385729 Detail

KK74AC374: Features: • Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 µA; 0.1 µA @ 25• High Noise Immunity ...

floor Price/Ceiling Price

Part Number:
KK74AC374
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/20

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Product Details

Description



Features:

• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA; 0.1 µA @ 25
• High Noise Immunity Characteristic of CMOS Devices
• Outputs Source/Sink 24 mA



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
VIN
DC Input Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
VOUT
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
±20
mA
IOUT
DC Output Sink/Source Current, per Pin
±50
mA
ICC
DC Supply Current, VCC and GND Pins
±50
mA
PD
Power Dissipation in Still Air, Plastic DIP+
                                       SOIC Package+
750
500
mW
TSTG
Storage Temperature
-65 to +150
TL
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
*Maximum Ratings are those values beyond which damage to the device may occur.
  Functional operation should be restricted to the Recommended Operating Conditions.
  +Derating - Plastic DIP: - 10 mW/ from 65° to 125
  SOIC Package: : - 7 mW/ from 65° to 125



Description

The KK74AC374 is identical in pinout to the LS/ALS374, HC/HCT374. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs.

Data meeting the setup and hold time is clocked to the outputs with the rising edge of the Clock. The Output Enable input does not affect the states of the flip-flops, but when Output Enable is high, the outputs are forced to the high-impedance state; thus, data may be stored even when the outputs are not enabled.




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