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KK74AC164

Features: • Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 A; 0.1 A @ 25• High Noise Immunity Characteristic of CMOS Devices• Outputs Source/Sink 24 mAPinoutSpecifications Symbol Parameter ...

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SeekIC No. : 004385707 Detail

KK74AC164: Features: • Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2.0 to 6.0 V• Low Input Current: 1.0 A; 0.1 A @ 25• High Noise Immunity Characteristic...

KK74AC164 Data Sheet

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Part Number:
KK74AC164
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/20

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Product Details

Description



Features:

• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 A; 0.1 A @ 25
• High Noise Immunity Characteristic of CMOS Devices
• Outputs Source/Sink 24 mA


Pinout

Connection Diagram


Specifications


Symbol

Parameter
Value
Unit
VCC
 DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
VIN
DC Input Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
VOUT
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
±20
mA
IOUT
DC Output Current, per Pin
±50
mA
ICC
DC Supply Current, VCC and GND Pins
±50
mA
PD
 Power Dissipation in Still Air, Plastic DIP, SOIC Package
750
500
mW
Tstg
 Storage Temperature
-65 to +150
TL
 Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
260
*Maximum Ratings are those values beyond which damage to the device may cur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/ from 65 to 125
SOIC Package: : - 7 mW/ from 65 to 125


Description

The KK74AC164 is identical in pinout to the LS/ALS164, HC/HCT164. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. The KK74AC164 is an 8-bit, serial-input to parallel-output shift register. Two serial data inputs, A1 and A2, are provided so that one input may be used as a data enable. Data is entered on each rising edge of the clock. The active-low asynchronous Reset overrides the Clock and Serial Data inputs.




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