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KK4060B

Features: • Operating Voltage Range: 3.0 to 18 V• Maximum input current of 1 A at 18 V over full package-temperature range; 100 nA at 18 V and 25• Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supplyPinou...

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SeekIC No. : 004385627 Detail

KK4060B: Features: • Operating Voltage Range: 3.0 to 18 V• Maximum input current of 1 A at 18 V over full package-temperature range; 100 nA at 18 V and 25• Noise margin (over full package t...

KK4060B Data Sheet

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Part Number:
KK4060B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/20

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Product Details

Description



Features:

• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 A at 18 V over full package-temperature range; 100 nA at 18 V and 25
• Noise margin (over full package temperature range):
   1.0 V min @ 5.0 V supply
   2.0 V min @ 10.0 V supply
   2.5 V min @ 15.0 V supply


Pinout

Connection Diagram


Specifications

Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) -0.5 to +20 V
VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
IIN DC Input Current, per Pin ±10 mA
PD Power Dissipation in Still Air, Plastic DIP+
SOIC Package+		 750
500		 mW
PD Power Dissipation per Output Transistor 100 mW
Tstg Storage Temperature -65 to +150
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)		 260

*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/ from 65° to 125
           SOIC Package: : - 7 mW/ from 65° to 125


Description

The KK4060B consists of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A RESET input is provided which resets the counter to the all-Q's state and disables the oscillator. A high level on the RESET line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition of OSC In (and OSC Out). Schmitt trigger action on the input-pulse line permits unlimited input-pulse rise and fall times.




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