Features: • Programmable gain, offset and skew control• 1.3 GHz analog input bandwidth• 52fs Clock Jitter• Over-range indicator• Selectable Clock Divider: ÷1, ÷2 or ÷4• Clock Phase Selection• Nap and Sleep modes• Two's complement, Gray code or Binary...
KAD5612P: Features: • Programmable gain, offset and skew control• 1.3 GHz analog input bandwidth• 52fs Clock Jitter• Over-range indicator• Selectable Clock Divider: ÷1, ÷2 or ÷4&...
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Parameter |
Min |
Max |
Units |
AVDD to AVSS |
-0.4 |
2.1 |
V |
OVDD to OVSS |
-0.4 |
2.1 |
V |
AVSS to OVSS |
-0.4 |
0.3 |
V |
Analog Inputs to AVSS |
-0.4 |
AVDD + 0.3 |
V |
Clock Inputs to AVSS |
-0.4 |
AVDD + 0.3 |
V |
Logic Input to AVSS |
-0.4 |
OVDD + 0.3 |
V |
Logic Inputs to OVSS |
-0.4 |
OVDD + 0.3 |
V |
Operating Temperature |
-0.4 |
85 |
°C |
Storage Temperature |
-65 |
150 |
°C |
Junction Temperature |
150 |
°C |
The KAD5612P is a family of low-power, highperformance, dual-channel 12-bit, analog-to-digital converters. Designed with Kenet's proprietary FemtoCharge® technology on a standard CMOS process, the family supports sampling rates of up to 250MSPS. The KAD5612P-25 is the fastest member of this pin-compatible family, which also features sample rates of 210MSPS (KAD5612P-21), 170MSPS (KAD5612P-17) and 125MSPS ( KAD5612P-12).
A serial peripheral interface (SPI) port allows for extensive configurability, as well as fine control of gain, skew and offset matching between the two converter cores.
Digital output data is presented in selectable LVDS or CMOS formats. The KAD5612P is available in a 72- contact QFN package with an exposed paddle.
Performance is specified over the full industrial temperature range (-40 to +85°C).