K9E2G08U0M

NOTE :
1. Minimum DC voltage is -0.6V on input/output pins. During transitions, this level may undershoot to -2.0V for periods <30ns. Maximum DC voltage on input/output pins is V_CC+0.3V which, during transitions, may overshoot to V_CC+2.0V for periods <20ns.
2. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Offered in 256Mx8bits, the K9E2G08U0M is 2Gbit with spare 64Mbit capacity. The K9E2G08U0M is offered in 3.3V Vcc. Its NAND cell provides the most cost-effective solutIon for the solid state mass storage market. A program operation can be performed in typical 200s on the 528-bytes and an erase operation can be performed in typical 2ms on a 16K-bytes block. Data in the page can be read out at 50ns cycle time per byte. The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write control automates all program and erase functions including pulse repetition, where required, and internal verification and margining of data. Even the write-intensive systems can take advantage of the  9E2G08U0Ms extended reliability of 100K program/ erase cycles by providing ECC(Error Correcting Code) with real time mapping-out algorithm.

The K9E2G08U0M is an optimum solution for large nonvolatile storage applications such as solid state file storage and other portable applications requiring non-volatility.