K4H561638F-UCCC

Features: • 200MHz Clock, 400Mbps data rate.• VDD= +2.6V + 0.10V, VDDQ= +2.6V + 0.10V• Double-data-rate architecture; two data transfers per clock cycle• Bidirectional data strobe(DQS)• Four banks operation• Differential clock inputs(CK and CK)• DLL aligns...

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K4H561638F-UCCC Picture
SeekIC No. : 004382816 Detail

K4H561638F-UCCC: Features: • 200MHz Clock, 400Mbps data rate.• VDD= +2.6V + 0.10V, VDDQ= +2.6V + 0.10V• Double-data-rate architecture; two data transfers per clock cycle• Bidirectional data s...

floor Price/Ceiling Price

Part Number:
K4H561638F-UCCC
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• 200MHz Clock, 400Mbps data rate.
• VDD= +2.6V + 0.10V, VDDQ= +2.6V + 0.10V
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Four banks operation
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• MRS cycle with address key programs
-. Read latency 3 (clock) for DDR400 , 2.5 (clock) for DDR333
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
• All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
• Data I/O transactions on both edges of data strobe
• Edge aligned data output, center aligned data input
• LDM,UDM for write masking only (x16)
• Auto & Self refresh
• 7.8us refresh interval(8K/64ms refresh)
• Maximum burst refresh cycle : 8
• 66pin TSOP II Pb-Free package
• RoHS compliant





Pinout

  Connection Diagram

  Connection Diagram




Specifications

Parameter
Symbol
Value
Unit
Voltage on any pin relative to VSS
VIN,VOUT
-0.5 ~ 3.6
V
Voltage on VDD & VDDQ supply relative to VSS
VDD,VDDQ
-1.0 ~ 3.6
V
Storage temperature
TSTG
-55 ~ +150
°C
Power dissipation
PD
1.5
W
Short circuit current
IOS
50
mA
Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.





Description

The K4H561638F-UCCC is designed as 16M x 16 DDR SDRAM F-die (x16).

The K4H561638F-UCCC has many features. (1) 200MHz Clock, 400Mbps data rate. (2) Vdd= +2.6V + 0.10V, Vddq= +2.6V + 0.10V. (3) Double-data-rate architecture; two data transfers per clock cycle. (4) Bidirectional data strobe(DQS). (5) Four banks operation. (6) Differential clock inputs (CK and CK). (7) DLL aligns DQ and DQS transition with CK transition. (8) MRS cycle with address key programs which means read latency 3 (clock) for DDR400 , 2.5 (clock) for DDR333, burst length (2, 4, 8) and burst type (sequential & interleave). (9) All inputs except data & DM are sampled at the positive going edge of the system clock(CK). (10) Data I/O transactions on both edges of data strobe. (11) Edge aligned data output, center aligned data input. (12) LDM,UDM for write masking only (x16). (13) Auto & Self refresh. (14) 7.8us refresh interval(8K/64ms refresh). (15) Maximum burst refresh cycle : 8. (16) 66pin TSOP II Pb-Free package. (17) RoHS compliant. That are all the main features.

Some absolute maximum ratings of K4H561638F-UCCC have been concluded into several points as follow. (1) Its voltage on any pin relative to Vss would be from -0.5V to 3.6V. (2) Its voltage on Vdd supply relative to Vss would be from -1.0V to 3.6V. (3) Its storage temperature would be from -55°C to +150°C. (4) Its power dissipation would be 1.5W. (5) Its short circuit current would be 50mA. It should be noted that permanent device damage may occur if "absolute maximum ratings" are exceeded.

Also some DC operating conditions about K4H561638F-UCCC. (1) Its supply voltage should be min 2.5V and max 2.7V. (2) Its input logic high voltage should be min Vref+0.15V and max Vddq+0.3V. (3) Its input logic low voltage should be min -0.3V and max Vref-0.15V. (4) Its input leakage current would be min -2uA and max 2uA. (5) Its I/O supply voltage would be min 2.5V and max 2.7V. And so on. If you have any question or suggestion or want to know more information please contact us for details. Thank you!






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