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K4H560438E-GCC4

Features: * 200MHz Clock, 400Mbps data rate.* VDD= +2.6V ±0.10V, VDDQ= ±2.6V + 0.10V * Double-data-rate architecture; two data transfers per clock cycle* Bidirectional data strobe [DQ] (x4,x8) * Four banks operation* Differential clock inputs(CK and CK)* DLL aligns DQ and DQS transition with CK tr...

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SeekIC No. : 004382790 Detail

K4H560438E-GCC4: Features: * 200MHz Clock, 400Mbps data rate.* VDD= +2.6V ±0.10V, VDDQ= ±2.6V + 0.10V * Double-data-rate architecture; two data transfers per clock cycle* Bidirectional data strobe [DQ] (x4,x8) * Fou...

K4H560438E-GCC4 Data Sheet

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Part Number:
K4H560438E-GCC4
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

* 200MHz Clock, 400Mbps data rate.
* VDD= +2.6V ±0.10V, VDDQ= ±2.6V + 0.10V
* Double-data-rate architecture; two data transfers per clock cycle
* Bidirectional data strobe [DQ] (x4,x8) 
* Four banks operation
* Differential clock inputs(CK and CK)
* DLL aligns  DQ and DQS transition with CK transition
* MRS cycle with address key programs  -. Read latency  3 (clock) for DDR400 , 2.5 (clock) for DDR333 -. Burst length (2, 4, 8)  -. Burst type (sequential & interleave)
* All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
* Data I/O transactions on both edges of data strobe
* Edge aligned data output, center aligned data input
* DM for write masking only (x4, x8)
* Auto & Self refresh
* 7.8us refresh interval(8K/64ms refresh)
* Maximum burst refresh cycle : 8
* 60Ball FBGA package


Specifications

Parameter Symbol Value Unit
Voltage on any pin relative to VSS
 VIN  , VOUT
 -0.5 ~ 3.6 V
Voltage on V DD& V  DDQsupply relative to VSS
 		 V DD, VDDQ
 		 -1.0 ~ 3.6 V
Storage temperature TSTG
 -55 ~ +150  
Power dissipation PD
 1.5 W
Short circuit current IOS
 50 mA



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