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K4H56038D

Features: • 200MHz Clock, 400Mbps data rate.• VDD= +2.6V +0.10V, VDDQ= +2.6V +0.10V • Double-data-rate architecture; two data transfers per clock cycle• Bidirectional data strobe(DQS)• Four banks operation• Differential clock inputs(CK and CK )• DLL aligns...

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SeekIC No. : 004382787 Detail

K4H56038D: Features: • 200MHz Clock, 400Mbps data rate.• VDD= +2.6V +0.10V, VDDQ= +2.6V +0.10V • Double-data-rate architecture; two data transfers per clock cycle• Bidirectional data st...

K4H56038D Data Sheet

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Part Number:
K4H56038D
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

• 200MHz Clock, 400Mbps data rate.
• VDD= +2.6V + 0.10V, VDDQ= +2.6V + 0.10V
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Four banks operation
• Differential clock inputs(CK and CK )
• DLL aligns  DQ and DQS transition with CK transition
• MRS cycle with address key programs
  -. Read latency  3 (clock) for DDR400 , 2.5 (clock) for DDR333
  -. Burst length (2, 4, 8)
  -. Burst type (sequential & interleave)
• All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
• Data I/O transactions on both edges of data strobe
• Edge aligned data output, center aligned data input
• LDM,UDM for write masking only (x16)
• DM for write masking only (x8)
• Auto & Self refresh
• 7.8us refresh interval(8K/64ms refresh)
• Maximum burst refresh cycle : 8
• 66pin TSOP II package




Pinout

Connection Diagram


Specifications

Parameter Symbol Value Unit
Voltage on any pin relative to VSS VIN, VOUT -0.5 ~ 3.6 V
Voltage on VDD & VDDQ supply relative to VSS VDD, VDDQ -1.0 ~ 3.6 V
Storage temperature TSTG -55 ~ +150
Power dissipation PD 1.5 W
Short circuit current IOS 50 mA



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