Features: • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR333 • VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.1V for DDR400• Double-data-rate architecture; two data transfers per clock cycle• Bidirectional data strobe [DQS] (x4,x8) & [L(U)DQS] (x16) • Four banks operationR...
K4H510438B-G(Z)C/LCC: Features: • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR333 • VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.1V for DDR400• Double-data-rate architecture; two data transfers per clock cycle...
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Features: • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR333 • VDD : 2.6V ± 0.1V, VDDQ...
Features: • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR333 • VDD : 2.6V ± 0.1V, VDDQ...
Features: • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR333 • VDD : 2.6V ± 0.1V, VDDQ...
Parameter | Symbol | Value | Unit |
Voltage on any pin relative to VSS | VIN, VOUT | -0.5 ~ 3.6 | V |
Voltage on VDD & VDDQ supply relative to VSS | VDD, VDDQ | -1.0 ~ 3.6 | V |
Storage temperature | TSTG | -55 ~ +150 | |
Power dissipation | PD | 1.5 | W |
Short circuit current | IOS | 50 | mA |
Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
The K4H510438B / K4H510838B / K4H511638B is 536,870,912 bits of double data rate synchronous DRAM organized as 4x 33,554,432 / 4x 16,777,216 / 4x 8,388,608 words by 4/8/16bits, fabricated with SAMSUNGs high performance CMOS technology. Syn-chronous features with Data Strobe allow extremely high performance up to 400Mb/s per pin. I/O transactions are possible on both edges of DQS. Range of operating frequencies, programmable burst length and programmable latencies allow the device to be useful for a variety of high performance memory system applications.