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IXBD4411

Features: ·1200 V or greater low-to-high side isolation.·Drives Power Systems Operating on up to 575 V AC mains·dv/dt immunity of greater than ±50V/ns·Proprietary low-to-high side level translation and communication·On-chip negative gate-drive supply to ensure Power MOSFET or IGBT turn-off and to ...

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SeekIC No. : 004381490 Detail

IXBD4411: Features: ·1200 V or greater low-to-high side isolation.·Drives Power Systems Operating on up to 575 V AC mains·dv/dt immunity of greater than ±50V/ns·Proprietary low-to-high side level translation ...

IXBD4411 Data Sheet

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Part Number:
IXBD4411
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

·1200 V or greater low-to-high side isolation.
·Drives Power Systems Operating on up to 575 V AC mains
·dv/dt immunity of greater than ±50V/ns
·Proprietary low-to-high side level translation and communication
·On-chip negative gate-drive supply to ensure Power MOSFET or IGBT turn-off and to prevent gate noise interference
·5 V logic compatible HCMOS inputs with hysteresis
·Available in either the 16-Pin DIP or the 16-Pin wide-body, small-outline plastic package
·20 ns switching time with 1000 pF load; 100 ns switching time with 10,000 pF load
·100 ns propagation delay time
·2 A peak output drive capability
·Self shut-down of output in response to over-current or short-circuit
·Under-voltage and over-voltage VDD lockout protection
·Protection from cross conduction of the half bridge
·Logic compatible fault indication from both low and high-side driver


Application

·1- or 3-Phase Motor Controls
·Switch Mode Power Supplies (SMPS)
·Uninterruptible Power Supplies (UPS)
·Induction Heating and Welding Systems
·Switching Amplifiers
·General Power Conversion Circuits


Pinout

Connection Diagram


Specifications

VDD/VEE  Supply Voltage . . . . . . . . . . . . . . . . . .  -0.5 ... 24
Vin   Input Voltage (INH, INL)  . . . . . . . . .  .-0.5...VDD +0.5
Iin  Input Current (INL, INH, IM)  . . . . . . . . . . . . . . . ..±10
Io (rev) Peak Reverse Output Current (OUT)  . . . . . . . . .2
PD Maximum Power Dissipation (TA = 25° C) . . . . . .  600
PD TC = 25° C (16-Pin SOIC)  . . . . . . . . . . . . . . . . . . . 10
TA Operating Ambient Temperature  . . . . . . . . . .-40 ... 85
TJM Maximum Junction Temperature  . . . . . . . . . . . . .  150
Tstg Storage Temperature Range  . . . . . . . . . . .-55 ... 150
TL Lead Soldering Temperature for  . . . . . . . . . . .10 s 300
RthJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.67
RthJC (16-Pin SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . .  . 10


Description

The IXBD4410/IXBD4411 ISOSMART chipset is designed to control the gates of two Power MOSFETs or Power IGBTs that are connected in a halfbridge (phase-leg) configuration for driving multiple-phase motors, or used in applications that require half-bridge power circuits. The IXBD4410/IXBD4411 is a full-feature chipset consisting of two 16-Pin DIP or SO devices interfaced and isolated by two small-signal ferrite pulse transformers. The small-signal transformers provide greater than 1200 V isolation.

Even with commutating noise ambients greater than ±50 V/ns and up to 1200 V potentials, this chipset establishes error-free two-way communications between the system ground-reference IXBD4410 and the inverter outputreference IXBD4411. They incorporate undervoltage VDD or VEE lockout and overcurrent or desaturation shutdown to protect the IGBT or Power MOSFET devices from damage.

The chipset provides the necessary gate drive signals to fully control the grounded-source low-side power device as well as the floating-source high-side power device. Additionally, the IXBD4410/4411 chipset provides a negative-going, off-state gate drive signal for improved turn-off of IGBTs or Power MOSFETs and a system logiccompatible status fault output FLT to indicate overcurrent or desaturation, and undervoltage VDD or VEE . During a status fault, both chipset keep their respective gate drive outputs off; at VEE.




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