IW4040B

Features: · Operating Voltage Range: 3.0 to 18 V· Maximum input current of 1 mA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C· Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply2.5 V min @ 15.0 V supplyPinoutSpecifications ...

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IW4040B Picture
SeekIC No. : 004381425 Detail

IW4040B: Features: · Operating Voltage Range: 3.0 to 18 V· Maximum input current of 1 mA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C· Noise margin (over full package temperature rang...

floor Price/Ceiling Price

Part Number:
IW4040B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

·  Operating Voltage Range: 3.0 to 18 V
·  Maximum input current of 1 mA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
·  Noise margin (over full package temperature range):
     1.0 V min @ 5.0 V supply
     2.0 V min @ 10.0 V supply
     2.5 V min @ 15.0 V supply



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) -0.5 to +20 V
VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
IIN DC Input Current, per Pin ±10 mA
PD Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
500*1 mW
Ptot Power Dissipation per Output Transistor 100 mW
Tstg Storage Temperature -65 to +150 °C
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260 °C


*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.
*1 For TA=-55 to 100°C (package plastic DIP), for TA=-55 to 65°C (package SOIC) +Derating - Plastic DIP: - 12 mW/°C from 100°Ñ to 125°C SOIC Package: : - 7 mW/°C from 65°Ñ to 125°C




Description

The IW4040B is ripple-carry binary counter. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times.




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