Features: `Operating Voltage Range: 3.0 to 18 V`Maximum input current of 1 at 18 V over full package- 16 temperature range;100 nA at 18 V and 25` Noise margin (over full package temperature range): 1.0 V min@ 5.0 V supply 2.0 V min@ 10.0 V supply 2.5 V min @15.0 V supplyPinoutSpeci...
IW4017B: Features: `Operating Voltage Range: 3.0 to 18 V`Maximum input current of 1 at 18 V over full package- 16 temperature range;100 nA at 18 V and 25` Noise margin (over full package temp...
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Symbol | Parameter | RATINGS | Unit |
VDD | DC Supply Voltage (Referenced to GND) | -0.5 to +20 | V |
VIN | DC Input Voltage (Referenced to GND) | -0.5 to VCC +0.5 | V |
VOUT | DC Output Voltage (Referenced to GND) | -0.5 to VCC +0.5 | V |
IIN | DC Input Current, per Pin | ±10 | mA |
PD | Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ | 750 500 |
mW |
PD | Power Dissipation per Output Transistor | 100 | mW |
TL | Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) | 260 | |
Tstg | storage temperature | -65 ~ +150 |
The IW4017B is 5 stageJohnson counter having 10 decode outputs. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fall times.
The counter IW4017B is advanced one count at the positive clock signal transition if the CLOCK INHIBITsignal is low. Counter advancement via the clock line isinhibited when the CLOCK INHIBIT signal is high. A high RESET signal clears the counter to its zero count. Use of the Johnson counter configuration permits highspeed operation, 2- input decode-gating and spike-free decoded outputs. Anti-lock gating is provided, thus assuring proper counting sequence. The decoded Outputs are normally low and go high only at their respective decoded time slot. Each decoded output remains high for one full clock cycle. A C ARR YSignal completes one cycle every 10 clock input cycles.