ISL6524A

Provides 4 Regulated Voltages
- Microprocessor Core, AGTL+ Bus, AGP Bus Power, and North/South Bridge Core
Drives N-Channel MOSFETs
Linear Regulator Drives Compatible with both MOSFET and Bipolar Series Pass Transistors
Simple Single-Loop Control Design
- Voltage-Mode PWM Control
Fast PWM Converter Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
Excellent Output Voltage Regulation
-Core PWM Output:±1% Over Temperature
-All Other Outputs: ±3% Over Temperature
VRM8.5 TTL-Compatible 5-Bit DAC Microprocessor Core Output Voltage Selection
- Wide Range - 1.050V to 1.825V
Power-Good Output Voltage Monitors
- Separate delayed VTT Power Good
Over-Voltage and Over-Current Fault Monitors
- Switching Regulator Doesn't Require Extra Current Sensing Element, Uses MOSFET's r_DS(ON)
Small Converter Size
- Constant Frequency Operation
- 200kHz Internal Oscillator
Pb-Free Available (RoHS Compliant₎

The ISL6524A provides the power control and protection for four output voltages in high-performance microprocessor and computer applications. The IC integrates one PWM controller and three linear controllers, as well as the monitoring and protection functions into a 28-pin SOIC package. The PWM controller regulates the microprocessor core voltage with a synchronous-rectified buck converter. One linear controller supplies the computer system's AGTL+ 1.2V bus power. The other two linear controllers regulate power for the 1.5V AGP bus and the 1.8V power for the chipset core voltage and/or cache memory circuits.

The ISL6524A includes an Intel VRM8.5 compatible, TTL 5-input digital-to-analog converter (DAC) that adjusts the microprocessor core-targeted PWM output voltage from 1.050V to 1.825V in 25mV steps. The precision reference and voltage-mode control provide ±1% static regulation. The linear regulators use external N-channel MOSFETs or bipolar NPN pass transistors to provide fixed output voltages of 1.2V ±3% (V_OUT2), 1.5V ±3% (V_OUT3) and 1.8V ±3% (V_OUT4).

The ISL6524A monitors all the output voltages. A delayed rising VTT (VOUT2 output) Power Good signal is issued before the core PWM starts to ramp up. Another system Power Good signal is issued when the core is within ±10% of the DAC setting and all other outputs are above their under voltage levels. Additional built-in over-voltage protection for the core output uses the lower MOSFET to prevent output voltages above 115% of the DAC setting. The PWM controllers' over-current function monitors the output current by using the voltage drop across the upper MOSFET's rDS(ON) , eliminating the need for a current sensing resistor.