ISL5740

Features: •Sampling Rate . . . . . . . . . . . . . . . . . . . . . .20/40/60MSPS•9.1 Bits at fIN= 10MHz•Low Power at 60MSPS. . . . . . . . . . . . . . . . . . . . . .280mW•Power Down Mode. . . . . . . . . . . . . . . . . . . . . . . . . . 6mW•Wide Full Power Input Ban...

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ISL5740 Picture
SeekIC No. : 004380007 Detail

ISL5740: Features: •Sampling Rate . . . . . . . . . . . . . . . . . . . . . .20/40/60MSPS•9.1 Bits at fIN= 10MHz•Low Power at 60MSPS. . . . . . . . . . . . . . . . . . . . . .280mW•Po...

floor Price/Ceiling Price

Part Number:
ISL5740
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/8/14

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Product Details

Description



Features:

•Sampling Rate . . . . . . . . . . . . . . . . . . . . . .20/40/60MSPS
•9.1 Bits at fIN = 10MHz
•Low Power at 60MSPS. . . . . . . . . . . . . . . . . . . . . .280mW
•Power Down Mode. . . . . . . . . . . . . . . . . . . . . . . . . . 6mW
•Wide Full Power Input Bandwidth. . . . . . . . . . . . .400MHz
•SFDR at fIN = 10MHz. . . . . . . . . . . . . . . . . . . . . . . . .70dB
•Excellent Channel-to-Channel Isolation. . . . . . . . . . .75dB
•On-Chip Sample and Hold Amplifiers
•Internal Bandgap Voltage Reference . . . . . . . . . . . .1.25V
•Single Supply Voltage Operation . . . . . . . . . .+2.7V - 3.6V
•TTL/CMOS(3V) Digital Inputs CMOS Digital Outputs
•Offset Binary or Two's Complement Digital Data Output
  Format
•Dual 10-Bit A/D Converters on a Monolithic Chip
•Pin Compatible Upgrade to AD9288



Pinout

  Connection Diagram


Specifications

Supply Voltage, AVCC or DVCC to AGND or DGND . . . . . . . . . . .4V
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3V
Digital I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . .. . . DGND to DVCC
Analog I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . AGND to AVCC
 


Description

The ISL5740 is a monolithic, dual 10-bit analog-to-digital converter fabricated in an advanced CMOS process. It is designed for high speed applications where integration, bandwidth and accuracy are essential. The ISL5740 features a 9-stage pipeline architecture. The fully pipelined architecture and an innovative input stage enable the ISL5740 to accept a variety of input configurations, singleended or fully differential. Only one external clock is necessary to drive both converters and an internal band-gap voltage reference is provided. This allows the system designer to realize an increased level of system integration resulting in decreased cost and power dissipation.

The ISL5740 has excellent dynamic performance while consuming less than 280mW power at 60MSPS. The A/D only requires a single +3.0V power supply. Data output latches are provided which present valid data to the output bus with a latency of 5 clock cycles.

The ISL5740 is offered in 20MSPS, 40MSPS and 60MSPS sampling rates. 




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