Features: Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . .40MSPS 7.4 Bits at fIN = 1MHz Low Power at 40MSPS. . . . . . . . . . . . . . . . . . . . . 100mW Power Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . <1mW Wide Full Power Input Bandwidth. . . . . . . . . ...
ISL5640: Features: Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . .40MSPS 7.4 Bits at fIN = 1MHz Low Power at 40MSPS. . . . . . . . . . . . . . . . . . . . . 100mW Power Down Mode . . . ....
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DescriptionThe ISL51002 3-channel, 10-bit Analog Front End (AFE) contains all the functionality ne...
DescriptionThe ISL51002 3-channel, 10-bit Analog Front End (AFE) contains all the functionality ne...
The ISL5640 is a monolithic, dual 8-bit analog-to-digital converter fabricated in an advanced CMOS process. It is designed for high speed applications where integration, bandwidth and accuracy are essential. The ISL5640 features a 9-stage pipeline architecture. The fully pipelined architecture and an innovative input stage enable the ISL5640 to accept a variety of input configurations, singleended or fully differential. Only one external clock is necessary to drive both converters and an internal band-gap voltage reference is provided. This allows the system designer to realize an increased level of system integration resulting in decreased cost and power dissipation.
The ISL5640 has excellent dynamic performance while consuming less than 100mW power at 40MSPS. The A/D only requires a single +3.0V power supply. Data output latches are provided which present valid data to the output bus with a latency of 5 clock cycles.
The ISL5640 is offered in 20MSPS, 30MSPS, 40MSPS and 60MSPS sampling rates.