ISL54103

Features:

• Active Termination for DDC Lines
• Enhances System Bus Signal Rise Time
• More Reliable HDCP Performance In Video Multiplexers and Cable Extenders
• Increases Maximum Cable Length While Guaranteeing Data Integrity
• 2.2mA Current Boost on Low to High Transitions
• 8kV ESD Protection on SDA and SCL Pins
• Wide Operating Voltage Range: 2.7V to 5.5V
• Small Package - 5 Ld SOT-23
• Pb-free Plus Anneal Available (RoHS Compliant)




Application

• Video Multiplexers
• Video Cable Extenders
• Video Distribution Amplifiers
• Televisions
• Computer Monitors
• Projectors




Pinout






Specifications

Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . .. . -1V to 6.5V
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . .+135
Storage Temperature Range . . . . . . . . . . . . . . . . .-65 to +150
Voltage on Pins . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V
Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . 300
ESD Min Other Pins (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2kV
ESD DDC1 and DDC2 Pins (HBM) . . . . . . . . . . . . . . . . . . . . ... .>8kV
CAUTION: Absolute Maximum Ratings indicate limits beyond which permanent damage to the device and impaired reliability may occur. These are stress ratings provided for information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification are not implied.

For guaranteed specifications and test conditions, see Electrical Specifications. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.

Description

The ISL54103 DDC Accelerator (DDCA) is a dual active pull-up bus terminator designed to improve data transmission speed on the DDC 2-wire serial bus interfaces. The DDCA ISL54103 detects rising input transitions with two internal voltage references and two comparators per channel. After the voltage on a data line crosses the first threshold (VTRIPL), the boost pull-up current source is activated to speed transition. After the voltage crosses the second threshold (VTRIPH), the boost pull-up current source is de-activated, leaving an active pull-up current of 275A on the line. When both channels are HIGH, the pull-up current for both lines is reduced to 100A to save power. Internal logic ensures that the active and boost pull-up current sources are not activated during downward transitions. The level for VTRIPH is controlled by a bandgap voltage referred to VDD. This ISL54103 feature makes the switching behavior invariant for all power supply voltages between 2.7V and 5.5V. A noise filter on each channel prevents the circuit from responding to input transitions that do not exceed a voltage-time threshold. To activate the boost circuit, the input must exceed VTRIPL by 100Vns (typical) (See Figure 10). The DDCA permits operation of the bus at frequencies up to 100kHz, despite the capacitive loads of multiple devices and/or long PC board traces. Enhanced ESD protection on the accelerator pins are guaranteed to withstand 8kV ESD (HBM) events. The DDC Accelerator provides an essential function in DDC applications because of distributed capacitance of the DDC wires in long video cables. By incorporating DDCA, systems using DDC can reliably increase their bus load, allowing longer cables, without the risk of data corruption.