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IS62LV256L

Features: •High-speed access time: 15, 20, 25 ns•Automatic power-down when chip is deselected•CMOS low power operation- 255 mW (max.) operating- 0.18 mW (max.) CMOS standby•TTL compatible interface levels•Single 3.3V power supply•Fully static operation: no clock...

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SeekIC No. : 004379268 Detail

IS62LV256L: Features: •High-speed access time: 15, 20, 25 ns•Automatic power-down when chip is deselected•CMOS low power operation- 255 mW (max.) operating- 0.18 mW (max.) CMOS standby•T...

IS62LV256L Data Sheet

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Part Number:
IS62LV256L
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

•High-speed access time: 15, 20, 25 ns
•Automatic power-down when chip is deselected
•CMOS low power operation
- 255 mW (max.) operating
- 0.18 mW (max.) CMOS standby
•TTL compatible interface levels
•Single 3.3V power supply
•Fully static operation: no clock or refresh required
•Three-state outputs


Pinout

Connection Diagram Connection Diagram


Specifications

Symbol

Parameter

Value

Unit

VTERM

Terminal Voltage with Respect to GND

0.5 to +4.6

V

TBIAS

Temperature Under Bias

55 to +125

°C

TSTG

Storage Temperature

65 to +150

°C

PT

Power Dissipation

0.5

W

IOUT

DC Output Current (LOW)

20

mA




Description

The  ISSI IS62LV256L is a very high-speed, low power,32,768-word by 8-bit static RAM. IS62LV256L is fabricated using ISSI's high-performance CMOS technology. This IS62LV256L highly reliable pro- cess coupled with innovative circuit design techniques, yields access times as fast as 15 ns maximum.

When CE is HIGH (deselected), the IS62LV256L assumes a standby mode at which the power dissipation is reduced to 50 µW (typical) with CMOS input levels.

Easy memory expansion is provided by using an active LOW Chip Enable (CE). The active LOW Write Enable (WE) controls both writing and reading of the memory.

The IS62LV256L is available in the JEDEC standard 28-pin SOJ and the 450-mil TSOP package.




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