IS62LV12816L

Features: * High-speed access time: 70, 100, and 120 ns* CMOS low power operation 120 mW (typical) operating 6 W (typical) CMOS standby* TTL compatible interface levels* Single 3V ± 10% VCC power supply* Fully static operation: no clock or refresh required* Three state outputs* Data control for ...

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SeekIC No. : 004379263 Detail

IS62LV12816L: Features: * High-speed access time: 70, 100, and 120 ns* CMOS low power operation 120 mW (typical) operating 6 W (typical) CMOS standby* TTL compatible interface levels* Single 3V ± 10% VCC power ...

floor Price/Ceiling Price

Part Number:
IS62LV12816L
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/3/13

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Product Details

Description



Features:

* High-speed access time: 70, 100, and 120 ns
* CMOS low power operation
   120 mW (typical) operating
   6 W (typical) CMOS standby
* TTL compatible interface levels
* Single 3V ± 10% VCC power supply
* Fully static operation: no clock or refresh required
* Three state outputs
* Data control for upper and lower bytes
* Industrial temperature available
* Available in the 44-pin TSOP (Type II) and 48-pin mini BGA



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VTERM Terminal Voltage with Respect to GND 0.5 toVcc+0.5 V
TBIAS Temperature Under Bias 40 to +85 °C
VCC Vcc Related to GND 0.3 to +4.0 V
TSTG Storage Temperature 65 to +150 °C
PT Power Dissipation 1.0 W



Description

The ISSI IS62LV12816L is a high-speed, 2,097,152-bit static RAM organized as 131,072 words by 16 bits. IS62LV12816L is fabricated using ISSI's high-performance CMOS technology. This IS62LV12816L highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices.

When  is HIGH (deselected), the IS62LV12816L assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs,  and . The active LOW Write Enable ( ) controls both writing and reading of the memory. A data byte allows Upper Byte () and Lower Byte () access.

The IS62LV12816L is packaged in the JEDEC standard 44-pin TSOP (Type II) and 48-pin mini BGA.


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